From 82f2ae56ed27b25f163db5ac4f2ccf0612640b07 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 8 Feb 2006 01:03:55 -0500 Subject: [PATCH] Alot of changes to push towards ISA independence. Highlights are renaming of the isa_desc files, movement of byte_swap.hh into sim, and the creation of arch/isa_traits.hh SConscript: Moved some files out of targetarch. The either no longer need to be there, never needed to be there, or should be referred to directly in arch/alpha due to there strictly alpha content. arch/alpha/isa_traits.hh: Added alpha's endianness to it's isa_traits.hh arch/mips/isa_traits.hh: Added MIPS endianness to it's isa_traits.hh arch/sparc/isa_traits.hh: Added SPARCs endianess to it's isa_traits.hh build/SConstruct: Added MIPS as a valid architecture cpu/exec_context.hh: Included arch/isa_traits.hh to bring in the endianness of the system. cpu/o3/alpha_cpu.hh: Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding of little endianness cpu/o3/fetch_impl.hh: kern/freebsd/freebsd_system.cc: Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding to little endianness. sim/system.cc: Included arch/isa_traits.hh to bring in the systems endianness, and removed the hardcoding to little endian. --HG-- extra : convert_revision : b1ab34b7569db531cd1c74f273b24222e63f9007 --- SConscript | 11 +++++++---- arch/alpha/isa_traits.hh | 3 +++ arch/mips/isa_traits.hh | 4 ++++ arch/sparc/isa_traits.hh | 4 ++++ build/SConstruct | 2 +- cpu/exec_context.hh | 1 + cpu/o3/alpha_cpu.hh | 6 ++++-- cpu/o3/fetch_impl.hh | 4 ++-- kern/freebsd/freebsd_system.cc | 5 +++-- sim/system.cc | 8 +++++--- 10 files changed, 34 insertions(+), 14 deletions(-) diff --git a/SConscript b/SConscript index 98dfad217..56a4e3610 100644 --- a/SConscript +++ b/SConscript @@ -339,24 +339,24 @@ syscall_emulation_sources = Split(''' # arch/alpha/alpha_tru64_process.cc targetarch_files = Split(''' - alpha_common_syscall_emul.hh alpha_linux_process.hh alpha_memory.hh alpha_tru64_process.hh aout_machdep.h arguments.hh - byte_swap.hh ecoff_machdep.h ev5.hh faults.hh isa_fullsys_traits.hh isa_traits.hh - osfpal.hh pseudo_inst.hh stacktrace.hh vptr.hh vtophys.hh ''') +# osfpal.hh +# byte_swap.hh +# alpha_common_syscall_emul.hh # Set up bridging headers to the architecture specific versions for f in targetarch_files: @@ -368,6 +368,9 @@ arch_source = SConscript('arch/%s/SConscript' % env['TARGET_ISA'], build_dir = 'build/%s/' % env['BUILD_DIR'], exports = 'env', duplicate = False) +# Add a flag defining what THE_ISA should be for all compilation +env.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())]) + # Set up complete list of sources based on configuration. sources = base_sources + arch_source @@ -432,7 +435,7 @@ env.Command(Split(''' env['TARGET_ISA'], env['TARGET_ISA'])), Split(''' - arch/%s/isa_desc + arch/%s/isa/main.isa arch/isa_parser.py''' % env['TARGET_ISA']), '$SRCDIR/arch/isa_parser.py $SOURCE $TARGET.dir arch/%s' % env['TARGET_ISA']) diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh index 2570d12f0..a17cde49b 100644 --- a/arch/alpha/isa_traits.hh +++ b/arch/alpha/isa_traits.hh @@ -29,6 +29,9 @@ #ifndef __ARCH_ALPHA_ISA_TRAITS_HH__ #define __ARCH_ALPHA_ISA_TRAITS_HH__ +namespace LittleEndianGuest {} +using namespace LittleEndianGuest; + #include "arch/alpha/faults.hh" #include "base/misc.hh" #include "config/full_system.hh" diff --git a/arch/mips/isa_traits.hh b/arch/mips/isa_traits.hh index e8401cefb..55e9c0dcb 100644 --- a/arch/mips/isa_traits.hh +++ b/arch/mips/isa_traits.hh @@ -29,6 +29,10 @@ #ifndef __ARCH_MIPS_ISA_TRAITS_HH__ #define __ARCH_MIPS_ISA_TRAITS_HH__ +//This makes sure the big endian versions of certain functions are used. +namespace LittleEndianGuest {} +using namespace LittleEndianGuest + #include "arch/mips/faults.hh" #include "base/misc.hh" #include "sim/host.hh" diff --git a/arch/sparc/isa_traits.hh b/arch/sparc/isa_traits.hh index 9513b99fc..7dd49aed9 100644 --- a/arch/sparc/isa_traits.hh +++ b/arch/sparc/isa_traits.hh @@ -29,6 +29,10 @@ #ifndef __ARCH_SPARC_ISA_TRAITS_HH__ #define __ARCH_SPARC_ISA_TRAITS_HH__ +//This makes sure the big endian versions of certain functions are used. +namespace BigEndianGuest {} +using namespace BigEndianGuest; + #include "arch/sparc/faults.hh" #include "base/misc.hh" #include "sim/host.hh" diff --git a/build/SConstruct b/build/SConstruct index 72b0930e1..c552e5639 100644 --- a/build/SConstruct +++ b/build/SConstruct @@ -223,7 +223,7 @@ env = conf.Finish() # value becomes sticky). sticky_opts = Options(args=ARGUMENTS) sticky_opts.AddOptions( - EnumOption('TARGET_ISA', 'Target ISA', 'alpha', ('alpha', 'sparc')), + EnumOption('TARGET_ISA', 'Target ISA', 'alpha', ('alpha', 'sparc', 'mips')), BoolOption('FULL_SYSTEM', 'Full-system support', False), BoolOption('ALPHA_TLASER', 'Model Alpha TurboLaser platform (vs. Tsunami)', False), diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index 2bde053b2..846be831a 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -34,6 +34,7 @@ #include "mem/mem_req.hh" #include "sim/host.hh" #include "sim/serialize.hh" +#include "arch/isa_traits.hh" #include "sim/byteswap.hh" // forward declaration: see functional_memory.hh diff --git a/cpu/o3/alpha_cpu.hh b/cpu/o3/alpha_cpu.hh index 164da4968..1e1a72af0 100644 --- a/cpu/o3/alpha_cpu.hh +++ b/cpu/o3/alpha_cpu.hh @@ -33,6 +33,8 @@ #define __CPU_O3_CPU_ALPHA_FULL_CPU_HH__ #include "cpu/o3/cpu.hh" +#include "arch/isa_traits.hh" +#include "sim/byteswap.hh" template class AlphaFullCPU : public FullO3CPU @@ -220,7 +222,7 @@ class AlphaFullCPU : public FullO3CPU Fault error; error = this->mem->read(req, data); - data = LittleEndianGuest::gtoh(data); + data = gtoh(data); return error; } @@ -277,7 +279,7 @@ class AlphaFullCPU : public FullO3CPU #endif - return this->mem->write(req, (T)LittleEndianGuest::htog(data)); + return this->mem->write(req, (T)::htog(data)); } template diff --git a/cpu/o3/fetch_impl.hh b/cpu/o3/fetch_impl.hh index 1a8411cc1..cd1ed1351 100644 --- a/cpu/o3/fetch_impl.hh +++ b/cpu/o3/fetch_impl.hh @@ -29,7 +29,7 @@ // Remove this later; used only for debugging. #define OPCODE(X) (X >> 26) & 0x3f - +#include "arch/isa_traits.hh" #include "sim/byteswap.hh" #include "cpu/exetrace.hh" #include "mem/base_mem.hh" @@ -535,7 +535,7 @@ SimpleFetch::fetch() assert(offset <= cacheBlkSize - instSize); // Get the instruction from the array of the cache line. - inst = LittleEndianGuest::gtoh(*reinterpret_cast + inst = gtoh(*reinterpret_cast (&cacheData[offset])); // Create a new DynInst from the instruction fetched. diff --git a/kern/freebsd/freebsd_system.cc b/kern/freebsd/freebsd_system.cc index f3fe84e00..dbf60a3fc 100644 --- a/kern/freebsd/freebsd_system.cc +++ b/kern/freebsd/freebsd_system.cc @@ -39,6 +39,7 @@ #include "mem/functional/memory_control.hh" #include "mem/functional/physical.hh" #include "sim/builder.hh" +#include "arch/isa_traits.hh" #include "sim/byteswap.hh" #include "targetarch/vtophys.hh" @@ -83,8 +84,8 @@ FreebsdSystem::doCalibrateClocks(ExecContext *xc) uint8_t *ppc = physmem->dma_addr(ppc_paddr, sizeof(uint32_t)); uint8_t *timer = physmem->dma_addr(timer_paddr, sizeof(uint32_t)); - *(uint32_t *)ppc = LittleEndianGuest::htog((uint32_t)Clock::Frequency); - *(uint32_t *)timer = LittleEndianGuest::htog((uint32_t)TIMER_FREQUENCY); + *(uint32_t *)ppc = htog((uint32_t)Clock::Frequency); + *(uint32_t *)timer = htog((uint32_t)TIMER_FREQUENCY); } diff --git a/sim/system.cc b/sim/system.cc index a69bf27f1..990145826 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -35,6 +35,8 @@ #include "mem/functional/physical.hh" #include "targetarch/vtophys.hh" #include "sim/builder.hh" +#include "arch/isa_traits.hh" +#include "sim/byteswap.hh" #include "sim/system.hh" #include "base/trace.hh" @@ -152,8 +154,8 @@ System::System(Params *p) if (!hwrpb) panic("could not translate hwrpb addr\n"); - *(uint64_t*)(hwrpb+0x50) = LittleEndianGuest::htog(params->system_type); - *(uint64_t*)(hwrpb+0x58) = LittleEndianGuest::htog(params->system_rev); + *(uint64_t*)(hwrpb+0x50) = htog(params->system_type); + *(uint64_t*)(hwrpb+0x58) = htog(params->system_rev); } else panic("could not find hwrpb\n"); @@ -249,7 +251,7 @@ System::setAlphaAccess(Addr access) if (!m5AlphaAccess) panic("could not translate m5AlphaAccess addr\n"); - *m5AlphaAccess = LittleEndianGuest::htog(EV5::Phys2K0Seg(access)); + *m5AlphaAccess = htog(EV5::Phys2K0Seg(access)); } else panic("could not find m5AlphaAccess\n"); }