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Change addressing in interrupt code to meet physical addressing requirements

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This commit is contained in:
Andrew Schultz 2004-02-19 16:33:36 -05:00
parent 941530d061
commit 8283dbcf3a
1 changed files with 4 additions and 4 deletions
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8
system/alpha/palcode/platform_m5.s
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@ -754,7 +754,7 @@ sys_int_23:
ALIGN_BRANCH ALIGN_BRANCH
sys_int_22: sys_int_22:
or r31,1,r16 // a0 means it is a I/O interrupt or r31,1,r16 // a0 means it is a I/O interrupt
lda r8,0x101(r31) lda r8,0xf01(r31)
sll r8,16,r8 sll r8,16,r8
lda r8,0xa000(r8) lda r8,0xa000(r8)
sll r8,16,r8 sll r8,16,r8
@ -766,7 +766,7 @@ sys_int_22:
ALIGN_BRANCH ALIGN_BRANCH
sys_int_21: sys_int_20:
Read_TLINTRSUMx(r13,r10,r14) // read the right TLINTRSUMx Read_TLINTRSUMx(r13,r10,r14) // read the right TLINTRSUMx
srl r13, 12, r13 // shift down to examine IPL15 srl r13, 12, r13 // shift down to examine IPL15
@ -795,10 +795,10 @@ sys_int_21:
ALIGN_BRANCH ALIGN_BRANCH
sys_int_20: sys_int_21:
or r31,3,r16 // a0 means it is a I/O interrupt or r31,3,r16 // a0 means it is a I/O interrupt
lda r8,0x0801(r31) lda r8,0xf01(r31)
sll r8,32,r8 sll r8,32,r8
ldah r9,0xa0(r31) ldah r9,0xa0(r31)
sll r9,8,r9 sll r9,8,r9