ARM: Add support for GDB on ARM
--HG-- rename : src/arch/alpha/remote_gdb.cc => src/arch/arm/remote_gdb.cc
This commit is contained in:
William Wang
parent
06864386a1
commit
80db6a5ecb
5 changed files with 389 additions and 19 deletions
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@ -60,6 +60,7 @@ if env['TARGET_ISA'] == 'arm':
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Source('nativetrace.cc')
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Source('tlb.cc')
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Source('utility.cc')
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Source('remote_gdb.cc')
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SimObject('ArmNativeTrace.py')
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SimObject('ArmTLB.py')
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346
src/arch/arm/remote_gdb.cc
Normal file
346
src/arch/arm/remote_gdb.cc
Normal file
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@ -0,0 +1,346 @@
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/*
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* Copyright (c) 2010 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2002-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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* William Wang
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*/
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/*
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* Copyright (c) 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratories.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
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*/
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $
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*
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* Taken from NetBSD
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*
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* "Stub" to allow remote cpu to debug over a serial line using gdb.
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*/
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#include <sys/signal.h>
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#include <unistd.h>
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#include <string>
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#include "config/full_system.hh"
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#if FULL_SYSTEM
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#include "arch/arm/vtophys.hh"
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#endif
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#include "arch/arm/utility.hh"
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#include "arch/arm/remote_gdb.hh"
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#include "arch/arm/registers.hh"
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#include "arch/arm/vtophys.hh"
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#include "base/intmath.hh"
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#include "base/remote_gdb.hh"
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#include "base/socket.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/thread_state.hh"
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#include "cpu/static_inst.hh"
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#include "mem/physical.hh"
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#include "mem/port.hh"
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#include "sim/system.hh"
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#include "arch/arm/pagetable.hh"
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#include "mem/page_table.hh"
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using namespace std;
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using namespace ArmISA;
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RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc)
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: BaseRemoteGDB(_system, tc, NUMREGS)
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{
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}
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/*
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* Determine if the mapping at va..(va+len) is valid.
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*/
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bool
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RemoteGDB::acc(Addr va, size_t len)
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{
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#if FULL_SYSTEM
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Addr last_va;
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va = truncPage(va);
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last_va = roundPage(va + len);
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do {
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if (virtvalid(context, va)) {
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return true;
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}
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va += PageBytes;
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} while (va < last_va);
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DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
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return true;
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#else
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TlbEntry entry;
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//Check to make sure the first byte is mapped into the processes address
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//space.
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if (context->getProcessPtr()->pTable->lookup(va, entry))
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return true;
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return false;
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#endif
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}
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/*
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* Translate the kernel debugger register format into the GDB register
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* format.
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*/
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void
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RemoteGDB::getregs()
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{
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DPRINTF(GDBAcc, "getregs in remotegdb \n");
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memset(gdbregs.regs, 0, gdbregs.bytes());
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// R0-R15 supervisor mode
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// arm registers are 32 bits wide, gdb registers are 64 bits wide
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// two arm registers are packed into one gdb register (little endian)
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gdbregs.regs[REG_R0 + 0] = context->readIntReg(INTREG_R1) << 32 |
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context->readIntReg(INTREG_R0);
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gdbregs.regs[REG_R0 + 1] = context->readIntReg(INTREG_R3) << 32 |
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context->readIntReg(INTREG_R2);
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gdbregs.regs[REG_R0 + 2] = context->readIntReg(INTREG_R5) << 32 |
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context->readIntReg(INTREG_R4);
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gdbregs.regs[REG_R0 + 3] = context->readIntReg(INTREG_R7) << 32 |
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context->readIntReg(INTREG_R6);
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gdbregs.regs[REG_R0 + 4] = context->readIntReg(INTREG_R9) << 32 |
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context->readIntReg(INTREG_R8);
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gdbregs.regs[REG_R0 + 5] = context->readIntReg(INTREG_R11) << 32|
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context->readIntReg(INTREG_R10);
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gdbregs.regs[REG_R0 + 6] = context->readIntReg(INTREG_SP) << 32 |
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context->readIntReg(INTREG_R12);
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gdbregs.regs[REG_R0 + 7] = context->pcState().pc() << 32 |
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context->readIntReg(INTREG_LR);
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// CPSR
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gdbregs.regs[REG_CPSR] = context->readMiscRegNoEffect(MISCREG_CPSR);
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// vfpv3/neon floating point registers (32 double or 64 float)
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gdbregs.regs[REG_F0] =
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static_cast<uint64_t>(context->readFloatRegBits(0)) << 32 |
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gdbregs.regs[REG_CPSR];
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for (int i = 1; i < (NumFloatArchRegs>>1); ++i) {
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gdbregs.regs[i + REG_F0] =
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static_cast<uint64_t>(context->readFloatRegBits(2*i)) << 32 |
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context->readFloatRegBits(2*i-1);
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}
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// FPSCR
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gdbregs.regs[REG_FPSCR] =
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static_cast<uint64_t>(context->readMiscRegNoEffect(MISCREG_FPSCR)) << 32 |
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context->readFloatRegBits(NumFloatArchRegs - 1);
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}
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/*
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* Translate the GDB register format into the kernel debugger register
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* format.
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*/
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void
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RemoteGDB::setregs()
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{
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DPRINTF(GDBAcc, "setregs in remotegdb \n");
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// R0-R15 supervisor mode
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// arm registers are 32 bits wide, gdb registers are 64 bits wide
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// two arm registers are packed into one gdb register (little endian)
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context->setIntReg(INTREG_R0 , bits(gdbregs.regs[REG_R0 + 0], 31, 0));
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context->setIntReg(INTREG_R1 , bits(gdbregs.regs[REG_R0 + 0], 63, 32));
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context->setIntReg(INTREG_R2 , bits(gdbregs.regs[REG_R0 + 1], 31, 0));
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context->setIntReg(INTREG_R3 , bits(gdbregs.regs[REG_R0 + 1], 63, 32));
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context->setIntReg(INTREG_R4 , bits(gdbregs.regs[REG_R0 + 2], 31, 0));
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context->setIntReg(INTREG_R5 , bits(gdbregs.regs[REG_R0 + 2], 63, 32));
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context->setIntReg(INTREG_R6 , bits(gdbregs.regs[REG_R0 + 3], 31, 0));
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context->setIntReg(INTREG_R7 , bits(gdbregs.regs[REG_R0 + 3], 63, 32));
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context->setIntReg(INTREG_R8 , bits(gdbregs.regs[REG_R0 + 4], 31, 0));
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context->setIntReg(INTREG_R9 , bits(gdbregs.regs[REG_R0 + 4], 63, 32));
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context->setIntReg(INTREG_R10, bits(gdbregs.regs[REG_R0 + 5], 31, 0));
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context->setIntReg(INTREG_R11, bits(gdbregs.regs[REG_R0 + 5], 63, 32));
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context->setIntReg(INTREG_R12, bits(gdbregs.regs[REG_R0 + 6], 31, 0));
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context->setIntReg(INTREG_SP , bits(gdbregs.regs[REG_R0 + 6], 63, 32));
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context->setIntReg(INTREG_LR , bits(gdbregs.regs[REG_R0 + 7], 31, 0));
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context->pcState(bits(gdbregs.regs[REG_R0 + 7], 63, 32));
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//CPSR
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context->setMiscRegNoEffect(MISCREG_CPSR, gdbregs.regs[REG_CPSR]);
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//vfpv3/neon floating point registers (32 double or 64 float)
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context->setFloatRegBits(0, gdbregs.regs[REG_F0]>>32);
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for (int i = 1; i < NumFloatArchRegs; ++i) {
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if(i%2){
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int j = (i+1)/2;
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context->setFloatRegBits(i, bits(gdbregs.regs[j + REG_F0], 31, 0));
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}
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else{
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int j = i/2;
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context->setFloatRegBits(i, gdbregs.regs[j + REG_F0]>>32);
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}
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}
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//FPSCR
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context->setMiscRegNoEffect(MISCREG_FPSCR, gdbregs.regs[REG_FPSCR]>>32);
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}
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void
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RemoteGDB::clearSingleStep()
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{
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DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n",
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takenBkpt, notTakenBkpt);
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if (takenBkpt != 0)
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clearTempBreakpoint(takenBkpt);
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if (notTakenBkpt != 0)
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clearTempBreakpoint(notTakenBkpt);
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}
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void
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RemoteGDB::setSingleStep()
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{
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PCState pc = context->pcState();
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PCState bpc;
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bool set_bt = false;
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// User was stopped at pc, e.g. the instruction at pc was not
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// executed.
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MachInst inst = read<MachInst>(pc.pc());
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StaticInstPtr si(inst, pc.pc());
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if (si->hasBranchTarget(pc, context, bpc)) {
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// Don't bother setting a breakpoint on the taken branch if it
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// is the same as the next pc
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if (bpc.pc() != pc.npc())
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set_bt = true;
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}
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DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n",
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takenBkpt, notTakenBkpt);
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setTempBreakpoint(notTakenBkpt = pc.npc());
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if (set_bt)
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setTempBreakpoint(takenBkpt = bpc.pc());
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}
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// Write bytes to kernel address space for debugger.
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bool
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RemoteGDB::write(Addr vaddr, size_t size, const char *data)
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{
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return BaseRemoteGDB::write(vaddr, size, data);
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}
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@ -35,32 +35,39 @@
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#include "base/remote_gdb.hh"
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class System;
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class ThreadContext;
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class PhysicalMemory;
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namespace ArmISA
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{
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// registers for arm with vfpv3/neon
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const int NUMREGS = 41; /* r0-r15, cpsr, d0-d31, fpscr */
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const int REG_R0 = 0;
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const int REG_F0 = 8;
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const int REG_CPSR = 8; /* bit 512 to bit 543 */
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const int REG_FPSCR = 40; /* bit 2592 to bit 2623 */
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class RemoteGDB : public BaseRemoteGDB
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{
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protected:
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Addr notTakenBkpt;
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Addr takenBkpt;
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protected:
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bool acc(Addr addr, size_t len);
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bool write(Addr addr, size_t size, const char *data);
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void getregs();
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void setregs();
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void clearSingleStep();
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void setSingleStep();
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public:
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//These needs to be written to suit ARM
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RemoteGDB(System *system, ThreadContext *context)
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: BaseRemoteGDB(system, context, 1)
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{}
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bool acc(Addr, size_t)
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{ panic("acc not implemented for ARM!"); }
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void getregs()
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{ panic("getregs not implemented for ARM!"); }
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void setregs()
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{ panic("setregs not implemented for ARM!"); }
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void clearSingleStep()
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{ panic("clearSingleStep not implemented for ARM!"); }
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void setSingleStep()
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{ panic("setSingleStep not implemented for ARM!"); }
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RemoteGDB(System *_system, ThreadContext *tc);
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};
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}
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} // namespace ArmISA
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#endif /* __ARCH_ARM_REMOTE_GDB_H__ */
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@ -157,4 +157,17 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
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dest->getITBPtr()->invalidateMiscReg();
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dest->getDTBPtr()->invalidateMiscReg();
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}
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Addr
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truncPage(Addr addr)
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{
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return addr & ~(PageBytes - 1);
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}
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Addr
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roundPage(Addr addr)
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{
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return (addr + PageBytes - 1) & ~(PageBytes - 1);
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}
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} // namespace ArmISA
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@ -168,6 +168,9 @@ advancePC(PCState &pc, const StaticInstPtr inst)
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inst->advancePC(pc);
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}
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Addr truncPage(Addr addr);
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||||
Addr roundPage(Addr addr);
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue