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ARM: Add support for GDB on ARM

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--HG--
rename : src/arch/alpha/remote_gdb.cc => src/arch/arm/remote_gdb.cc
This commit is contained in:
William Wang 2010-11-15 14:04:03 -06:00
parent 06864386a1
commit 80db6a5ecb
5 changed files with 389 additions and 19 deletions
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1
src/arch/arm/SConscript
View file

@ -60,6 +60,7 @@ if env['TARGET_ISA'] == 'arm':
Source('nativetrace.cc')
Source('tlb.cc')
Source('utility.cc')
Source('remote_gdb.cc')
SimObject('ArmNativeTrace.py')
SimObject('ArmTLB.py')

346
src/arch/arm/remote_gdb.cc Normal file
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@ -0,0 +1,346 @@
/*
* Copyright (c) 2010 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Copyright (c) 2002-2005 The Regents of The University of Michigan
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Nathan Binkert
* William Wang
*/
/*
* Copyright (c) 1990, 1993
* The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
* contributed to Berkeley.
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Lawrence Berkeley Laboratories.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
*/
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the NetBSD
* Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $
*
* Taken from NetBSD
*
* "Stub" to allow remote cpu to debug over a serial line using gdb.
*/
#include <sys/signal.h>
#include <unistd.h>
#include <string>
#include "config/full_system.hh"
#if FULL_SYSTEM
#include "arch/arm/vtophys.hh"
#endif
#include "arch/arm/utility.hh"
#include "arch/arm/remote_gdb.hh"
#include "arch/arm/registers.hh"
#include "arch/arm/vtophys.hh"
#include "base/intmath.hh"
#include "base/remote_gdb.hh"
#include "base/socket.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "cpu/thread_state.hh"
#include "cpu/static_inst.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
#include "sim/system.hh"
#include "arch/arm/pagetable.hh"
#include "mem/page_table.hh"
using namespace std;
using namespace ArmISA;
RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc)
: BaseRemoteGDB(_system, tc, NUMREGS)
{
}
/*
* Determine if the mapping at va..(va+len) is valid.
*/
bool
RemoteGDB::acc(Addr va, size_t len)
{
#if FULL_SYSTEM
Addr last_va;
va = truncPage(va);
last_va = roundPage(va + len);
do {
if (virtvalid(context, va)) {
return true;
}
va += PageBytes;
} while (va < last_va);
DPRINTF(GDBAcc, "acc: %#x mapping is valid\n", va);
return true;
#else
TlbEntry entry;
//Check to make sure the first byte is mapped into the processes address
//space.
if (context->getProcessPtr()->pTable->lookup(va, entry))
return true;
return false;
#endif
}
/*
* Translate the kernel debugger register format into the GDB register
* format.
*/
void
RemoteGDB::getregs()
{
DPRINTF(GDBAcc, "getregs in remotegdb \n");
memset(gdbregs.regs, 0, gdbregs.bytes());
// R0-R15 supervisor mode
// arm registers are 32 bits wide, gdb registers are 64 bits wide
// two arm registers are packed into one gdb register (little endian)
gdbregs.regs[REG_R0 + 0] = context->readIntReg(INTREG_R1) << 32 |
context->readIntReg(INTREG_R0);
gdbregs.regs[REG_R0 + 1] = context->readIntReg(INTREG_R3) << 32 |
context->readIntReg(INTREG_R2);
gdbregs.regs[REG_R0 + 2] = context->readIntReg(INTREG_R5) << 32 |
context->readIntReg(INTREG_R4);
gdbregs.regs[REG_R0 + 3] = context->readIntReg(INTREG_R7) << 32 |
context->readIntReg(INTREG_R6);
gdbregs.regs[REG_R0 + 4] = context->readIntReg(INTREG_R9) << 32 |
context->readIntReg(INTREG_R8);
gdbregs.regs[REG_R0 + 5] = context->readIntReg(INTREG_R11) << 32|
context->readIntReg(INTREG_R10);
gdbregs.regs[REG_R0 + 6] = context->readIntReg(INTREG_SP) << 32 |
context->readIntReg(INTREG_R12);
gdbregs.regs[REG_R0 + 7] = context->pcState().pc() << 32 |
context->readIntReg(INTREG_LR);
// CPSR
gdbregs.regs[REG_CPSR] = context->readMiscRegNoEffect(MISCREG_CPSR);
// vfpv3/neon floating point registers (32 double or 64 float)
gdbregs.regs[REG_F0] =
static_cast<uint64_t>(context->readFloatRegBits(0)) << 32 |
gdbregs.regs[REG_CPSR];
for (int i = 1; i < (NumFloatArchRegs>>1); ++i) {
gdbregs.regs[i + REG_F0] =
static_cast<uint64_t>(context->readFloatRegBits(2*i)) << 32 |
context->readFloatRegBits(2*i-1);
}
// FPSCR
gdbregs.regs[REG_FPSCR] =
static_cast<uint64_t>(context->readMiscRegNoEffect(MISCREG_FPSCR)) << 32 |
context->readFloatRegBits(NumFloatArchRegs - 1);
}
/*
* Translate the GDB register format into the kernel debugger register
* format.
*/
void
RemoteGDB::setregs()
{
DPRINTF(GDBAcc, "setregs in remotegdb \n");
// R0-R15 supervisor mode
// arm registers are 32 bits wide, gdb registers are 64 bits wide
// two arm registers are packed into one gdb register (little endian)
context->setIntReg(INTREG_R0 , bits(gdbregs.regs[REG_R0 + 0], 31, 0));
context->setIntReg(INTREG_R1 , bits(gdbregs.regs[REG_R0 + 0], 63, 32));
context->setIntReg(INTREG_R2 , bits(gdbregs.regs[REG_R0 + 1], 31, 0));
context->setIntReg(INTREG_R3 , bits(gdbregs.regs[REG_R0 + 1], 63, 32));
context->setIntReg(INTREG_R4 , bits(gdbregs.regs[REG_R0 + 2], 31, 0));
context->setIntReg(INTREG_R5 , bits(gdbregs.regs[REG_R0 + 2], 63, 32));
context->setIntReg(INTREG_R6 , bits(gdbregs.regs[REG_R0 + 3], 31, 0));
context->setIntReg(INTREG_R7 , bits(gdbregs.regs[REG_R0 + 3], 63, 32));
context->setIntReg(INTREG_R8 , bits(gdbregs.regs[REG_R0 + 4], 31, 0));
context->setIntReg(INTREG_R9 , bits(gdbregs.regs[REG_R0 + 4], 63, 32));
context->setIntReg(INTREG_R10, bits(gdbregs.regs[REG_R0 + 5], 31, 0));
context->setIntReg(INTREG_R11, bits(gdbregs.regs[REG_R0 + 5], 63, 32));
context->setIntReg(INTREG_R12, bits(gdbregs.regs[REG_R0 + 6], 31, 0));
context->setIntReg(INTREG_SP , bits(gdbregs.regs[REG_R0 + 6], 63, 32));
context->setIntReg(INTREG_LR , bits(gdbregs.regs[REG_R0 + 7], 31, 0));
context->pcState(bits(gdbregs.regs[REG_R0 + 7], 63, 32));
//CPSR
context->setMiscRegNoEffect(MISCREG_CPSR, gdbregs.regs[REG_CPSR]);
//vfpv3/neon floating point registers (32 double or 64 float)
context->setFloatRegBits(0, gdbregs.regs[REG_F0]>>32);
for (int i = 1; i < NumFloatArchRegs; ++i) {
if(i%2){
int j = (i+1)/2;
context->setFloatRegBits(i, bits(gdbregs.regs[j + REG_F0], 31, 0));
}
else{
int j = i/2;
context->setFloatRegBits(i, gdbregs.regs[j + REG_F0]>>32);
}
}
//FPSCR
context->setMiscRegNoEffect(MISCREG_FPSCR, gdbregs.regs[REG_FPSCR]>>32);
}
void
RemoteGDB::clearSingleStep()
{
DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n",
takenBkpt, notTakenBkpt);
if (takenBkpt != 0)
clearTempBreakpoint(takenBkpt);
if (notTakenBkpt != 0)
clearTempBreakpoint(notTakenBkpt);
}
void
RemoteGDB::setSingleStep()
{
PCState pc = context->pcState();
PCState bpc;
bool set_bt = false;
// User was stopped at pc, e.g. the instruction at pc was not
// executed.
MachInst inst = read<MachInst>(pc.pc());
StaticInstPtr si(inst, pc.pc());
if (si->hasBranchTarget(pc, context, bpc)) {
// Don't bother setting a breakpoint on the taken branch if it
// is the same as the next pc
if (bpc.pc() != pc.npc())
set_bt = true;
}
DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n",
takenBkpt, notTakenBkpt);
setTempBreakpoint(notTakenBkpt = pc.npc());
if (set_bt)
setTempBreakpoint(takenBkpt = bpc.pc());
}
// Write bytes to kernel address space for debugger.
bool
RemoteGDB::write(Addr vaddr, size_t size, const char *data)
{
return BaseRemoteGDB::write(vaddr, size, data);
}

45
src/arch/arm/remote_gdb.hh
View file

@ -35,32 +35,39 @@
#include "base/remote_gdb.hh"
class System;
class ThreadContext;
class PhysicalMemory;
namespace ArmISA
{
class RemoteGDB : public BaseRemoteGDB
{
public:
//These needs to be written to suit ARM
// registers for arm with vfpv3/neon
const int NUMREGS = 41; /* r0-r15, cpsr, d0-d31, fpscr */
const int REG_R0 = 0;
const int REG_F0 = 8;
const int REG_CPSR = 8; /* bit 512 to bit 543 */
const int REG_FPSCR = 40; /* bit 2592 to bit 2623 */
RemoteGDB(System *system, ThreadContext *context)
: BaseRemoteGDB(system, context, 1)
{}
class RemoteGDB : public BaseRemoteGDB
{
bool acc(Addr, size_t)
{ panic("acc not implemented for ARM!"); }
protected:
Addr notTakenBkpt;
Addr takenBkpt;
void getregs()
{ panic("getregs not implemented for ARM!"); }
protected:
bool acc(Addr addr, size_t len);
bool write(Addr addr, size_t size, const char *data);
void setregs()
{ panic("setregs not implemented for ARM!"); }
void getregs();
void setregs();
void clearSingleStep()
{ panic("clearSingleStep not implemented for ARM!"); }
void clearSingleStep();
void setSingleStep();
void setSingleStep()
{ panic("setSingleStep not implemented for ARM!"); }
};
}
public:
RemoteGDB(System *_system, ThreadContext *tc);
};
} // namespace ArmISA
#endif /* __ARCH_ARM_REMOTE_GDB_H__ */

13
src/arch/arm/utility.cc
View file

@ -157,4 +157,17 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
dest->getITBPtr()->invalidateMiscReg();
dest->getDTBPtr()->invalidateMiscReg();
}
Addr
truncPage(Addr addr)
{
return addr & ~(PageBytes - 1);
}
Addr
roundPage(Addr addr)
{
return (addr + PageBytes - 1) & ~(PageBytes - 1);
}
} // namespace ArmISA

3
src/arch/arm/utility.hh
View file

@ -168,6 +168,9 @@ advancePC(PCState &pc, const StaticInstPtr inst)
inst->advancePC(pc);
}
Addr truncPage(Addr addr);
Addr roundPage(Addr addr);
};