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X86: Fix a number of places where the wrong form of a microop was used.

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This commit is contained in:
Gabe Black 2009-07-16 09:27:56 -07:00
parent 3f9b0cc5ca
commit 80c834ccac
5 changed files with 10 additions and 10 deletions
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6
src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py
View file

@ -84,7 +84,7 @@
microcode = ''' microcode = '''
def macroop BSR_R_R { def macroop BSR_R_R {
# Determine if the input was zero, and also move it to a temp reg. # Determine if the input was zero, and also move it to a temp reg.
movi t1, t1, t0, dataSize=8 mov t1, t1, t0, dataSize=8
and t1, regm, regm, flags=(ZF,) and t1, regm, regm, flags=(ZF,)
br label("end"), flags=(CZF,) br label("end"), flags=(CZF,)
@ -132,7 +132,7 @@ end:
def macroop BSR_R_M { def macroop BSR_R_M {
movi t1, t1, t0, dataSize=8 mov t1, t1, t0, dataSize=8
ld t1, seg, sib, disp ld t1, seg, sib, disp
# Determine if the input was zero, and also move it to a temp reg. # Determine if the input was zero, and also move it to a temp reg.
@ -184,7 +184,7 @@ end:
def macroop BSR_R_P { def macroop BSR_R_P {
rdip t7 rdip t7
movi t1, t1, t0, dataSize=8 mov t1, t1, t0, dataSize=8
ld t1, seg, riprel, disp ld t1, seg, riprel, disp
# Determine if the input was zero, and also move it to a temp reg. # Determine if the input was zero, and also move it to a temp reg.

2
src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
View file

@ -143,7 +143,7 @@ processCSDescriptor:
# appropriate/other RIP checks. # appropriate/other RIP checks.
# if temp_RIP > CS.limit throw #GP(0) # if temp_RIP > CS.limit throw #GP(0)
rdlimit t6, cs, dataSize=8 rdlimit t6, cs, dataSize=8
subi t0, t1, t6, flags=(ECF,) sub t0, t1, t6, flags=(ECF,)
fault "new GeneralProtection(0)", flags=(CECF,) fault "new GeneralProtection(0)", flags=(CECF,)
#(temp_CPL!=CPL) #(temp_CPL!=CPL)

4
src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
View file

@ -118,7 +118,7 @@ def macroop JMP_FAR_I
limm t2, imm, dataSize=8 limm t2, imm, dataSize=8
# Figure out the width of the offset. # Figure out the width of the offset.
limm t3, dsz, dataSize=8 limm t3, dsz, dataSize=8
sll t3, t3, 3, dataSize=8 slli t3, t3, 3, dataSize=8
# Get the selector into t1. # Get the selector into t1.
sll t1, t2, t3, dataSize=8 sll t1, t2, t3, dataSize=8
mov t1, t0, t1, dataSize=2 mov t1, t0, t1, dataSize=2
@ -178,7 +178,7 @@ def macroop JMP_FAR_REAL_I
limm t2, imm, dataSize=8 limm t2, imm, dataSize=8
# Figure out the width of the offset. # Figure out the width of the offset.
limm t3, dsz, dataSize=8 limm t3, dsz, dataSize=8
sll t3, t3, 3, dataSize=8 slli t3, t3, 3, dataSize=8
# Get the selector into t1. # Get the selector into t1.
sll t1, t2, t3, dataSize=8 sll t1, t2, t3, dataSize=8
mov t1, t0, t1, dataSize=2 mov t1, t0, t1, dataSize=2

4
src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
View file

@ -163,7 +163,7 @@ def macroop ENTER_I_I {
# Pull the different components out of the immediate # Pull the different components out of the immediate
limm t1, imm limm t1, imm
zexti t2, t1, 15, dataSize=8 zexti t2, t1, 15, dataSize=8
srl t1, t1, 16 srli t1, t1, 16
zexti t1, t1, 5, dataSize=8 zexti t1, t1, 5, dataSize=8
# t1 is now the masked nesting level, and t2 is the amount of storage. # t1 is now the masked nesting level, and t2 is the amount of storage.
@ -174,7 +174,7 @@ def macroop ENTER_I_I {
mov t6, t6, rsp, dataSize=asz mov t6, t6, rsp, dataSize=asz
# If the nesting level is zero, skip all this stuff. # If the nesting level is zero, skip all this stuff.
subi t0, t1, t0, flags=(EZF,), dataSize=2 sub t0, t1, t0, flags=(EZF,), dataSize=2
br label("skipLoop"), flags=(CEZF,) br label("skipLoop"), flags=(CEZF,)
# If the level was 1, only push the saved rbp # If the level was 1, only push the saved rbp

4
src/arch/x86/isa/insts/general_purpose/system_calls.py
View file

@ -65,7 +65,7 @@ def macroop SYSCALL_64
# Stick rflags with RF masked into r11. # Stick rflags with RF masked into r11.
rflags t2 rflags t2
limm t3, "~RFBit", dataSize=8 limm t3, "~RFBit", dataSize=8
andi r11, t2, t3, dataSize=8 and r11, t2, t3, dataSize=8
rdval t3, star rdval t3, star
srli t3, t3, 32, dataSize=8 srli t3, t3, 32, dataSize=8
@ -118,7 +118,7 @@ def macroop SYSCALL_COMPAT
# Stick rflags with RF masked into r11. # Stick rflags with RF masked into r11.
rflags t2 rflags t2
limm t3, "~RFBit", dataSize=8 limm t3, "~RFBit", dataSize=8
andi r11, t2, t3, dataSize=8 and r11, t2, t3, dataSize=8
rdval t3, star rdval t3, star
srli t3, t3, 32, dataSize=8 srli t3, t3, 32, dataSize=8