From 805b9cf1d5ace9c02b7bd120ee1bc082f544699d Mon Sep 17 00:00:00 2001 From: Korey Sewell Date: Thu, 16 Mar 2006 18:39:54 -0500 Subject: [PATCH] Found and fixed 3 decoder.isa bugs!!! Now the hello_world program runs for a while before getting in a infinite loop. It actually "tries" to syscall too, but syscalls aren't implemented just yet arch/mips/faults.cc: more descriptive names for faults (will help future users as well as me!) arch/mips/isa/base.isa: make sure we are printing out "BasicOp" format disassembly instructions as dest,src,src instead of src,src,dest arch/mips/isa/decoder.isa: FIX LW/SW Bug!!!! I was actually loading a byte instead of a word FIX JALR Bug!!!! I was not saving the link address in R31 for this instruction FIX SLL/NOP Bug!!! We now recognize the varying flavors of sll,nop,ehb,& ssnop correctly base/loader/elf_object.cc: change back to original way base/loader/elf_object.hh: change back to original! --HG-- extra : convert_revision : 39b65fba31c1842ac6966346fe8a35816a4231fa --- arch/mips/faults.cc | 4 ++-- arch/mips/isa/base.isa | 25 +++++++++++-------------- arch/mips/isa/decoder.isa | 26 +++++++++++++------------- base/loader/elf_object.cc | 39 ++------------------------------------- base/loader/elf_object.hh | 2 +- 5 files changed, 29 insertions(+), 67 deletions(-) diff --git a/arch/mips/faults.cc b/arch/mips/faults.cc index 142328c40..1b31dfa69 100644 --- a/arch/mips/faults.cc +++ b/arch/mips/faults.cc @@ -34,11 +34,11 @@ namespace MipsISA { -FaultName MachineCheckFault::_name = "mchk"; +FaultName MachineCheckFault::_name = "Machine Check"; FaultVect MachineCheckFault::_vect = 0x0401; FaultStat MachineCheckFault::_count; -FaultName AlignmentFault::_name = "unalign"; +FaultName AlignmentFault::_name = "Alignment"; FaultVect AlignmentFault::_vect = 0x0301; FaultStat AlignmentFault::_count; diff --git a/arch/mips/isa/base.isa b/arch/mips/isa/base.isa index 4125b5101..89837c136 100644 --- a/arch/mips/isa/base.isa +++ b/arch/mips/isa/base.isa @@ -66,27 +66,24 @@ output decoder {{ ccprintf(ss, "%-10s ", mnemonic); - // just print the first two source regs... if there's - // a third one, it's a read-modify-write dest (Rc), - // e.g. for CMOVxx - if(_numSrcRegs > 0) - { + if(_numDestRegs > 0){ + if(_numSrcRegs > 0) + ss << ","; + printReg(ss, _destRegIdx[0]); + } + + if(_numSrcRegs > 0) { printReg(ss, _srcRegIdx[0]); } - if(_numSrcRegs > 1) - { + if(_numSrcRegs > 1) { ss << ","; printReg(ss, _srcRegIdx[1]); } - // just print the first dest... if there's a second one, - // it's generally implicit - if(_numDestRegs > 0) - { - if(_numSrcRegs > 0) - ss << ","; - printReg(ss, _destRegIdx[0]); + + if(mnemonic == "sll"){ + ccprintf(ss," %d",SA); } return ss.str(); diff --git a/arch/mips/isa/decoder.isa b/arch/mips/isa/decoder.isa index 93e7238f8..2e5f8e536 100644 --- a/arch/mips/isa/decoder.isa +++ b/arch/mips/isa/decoder.isa @@ -28,19 +28,19 @@ decode OPCODE_HI default Unknown::unknown() { format BasicOp { //Table A-3 Note: "1. Specific encodings of the rt, rd, and sa fields - //are used to distinguish among the SLL, NOP, SSNOP and EHB functions." - + //are used to distinguish among the SLL, NOP, SSNOP and EHB functions. 0x0: decode RS { - 0x0: decode RT { - 0x0: decode RD default Nop::nop() { + 0x0: decode RT { //fix Nop traditional vs. Nop converted disassembly later + 0x0: decode RD default Nop::nop(){ 0x0: decode SA { - 0x1: ssnop({{ ; }}); //really sll r0,r0,1 - 0x3: ehb({{ ; }}); //really sll r0,r0,3 + 0x1: ssnop({{ ; }}); //really sll r0,r0,1 + 0x3: ehb({{ ; }}); //really sll r0,r0,3 } } + + default: sll({{ Rd = Rt.uw << SA; }}); } - default: sll({{ Rd = Rt.uw << SA; }}); } 0x2: decode SRL { @@ -77,9 +77,9 @@ decode OPCODE_HI default Unknown::unknown() { } 0x1: decode HINT { - 0: jalr({{ NNPC = Rs; }},IsCall,IsReturn); + 0: jalr({{ Rd = NNPC; NNPC = Rs; }},IsCall,IsReturn); - 1: jalr_hb({{ NNPC = Rs; clear_exe_inst_hazards();}},IsCall,IsReturn); + 1: jalr_hb({{ Rd = NNPC; NNPC = Rs; clear_exe_inst_hazards();}},IsCall,IsReturn); } } @@ -866,7 +866,7 @@ decode OPCODE_HI default Unknown::unknown() { 0x0: lb({{ Rt.sw = Mem.sb; }}); 0x1: lh({{ Rt.sw = Mem.sh; }}); 0x2: lwl({{ Rt.sw = Mem.sw; }});//, WordAlign); - 0x3: lw({{ Rt.sw = Mem.sb; }}); + 0x3: lw({{ Rt.sw = Mem.sw; }}); 0x4: lbu({{ Rt.uw = Mem.ub; }}); 0x5: lhu({{ Rt.uw = Mem.uh; }}); 0x6: lwr({{ Rt.uw = Mem.uw; }});//, WordAlign); @@ -879,9 +879,9 @@ decode OPCODE_HI default Unknown::unknown() { format StoreMemory { 0x0: sb({{ Mem.ub = Rt<7:0>; }}); 0x1: sh({{ Mem.uh = Rt<15:0>; }}); - 0x2: swl({{ Mem.ub = Rt<31:0>; }});//,WordAlign); - 0x3: sw({{ Mem.ub = Rt<31:0>; }}); - 0x6: swr({{ Mem.ub = Rt<31:0>; }});//,WordAlign); + 0x2: swl({{ Mem.uw = Rt<31:0>; }});//,WordAlign); + 0x3: sw({{ Mem.uw = Rt<31:0>; }}); + 0x6: swr({{ Mem.uw = Rt<31:0>; }});//,WordAlign); } format WarnUnimpl { diff --git a/base/loader/elf_object.cc b/base/loader/elf_object.cc index b9636b454..06c0ae663 100644 --- a/base/loader/elf_object.cc +++ b/base/loader/elf_object.cc @@ -157,48 +157,14 @@ ElfObject::tryFile(const string &fname, int fd, size_t len, uint8_t *data) } // while sections } - int32_t global_ptr; - if (arch == ObjectFile::Mips) { - Elf_Scn *section; - GElf_Shdr shdr; - Elf_Data *rdata; - int secIdx = 1; - - // Get the first section - section = elf_getscn(elf, secIdx); - - // While there are no more sections - while (section != NULL) { - gelf_getshdr(section, &shdr); - /*shdr.sh_type == SHT_MIPS_REGINFO && */ - if (!strcmp(".reginfo",elf_strptr(elf, ehdr.e_shstrndx, shdr.sh_name))) { - // We have found MIPS reginfo section: - // ------------------------------- - // Check the 6th 32bit word for the initialized global pointer value - // ------------------------------- - rdata = elf_rawdata(section, NULL); - assert(rdata->d_buf); - - if(ehdr.e_ident[EI_DATA] == ELFDATA2LSB) - global_ptr = htole(((int32_t*)rdata->d_buf)[5]); - else - global_ptr = htobe(((int32_t*)rdata->d_buf)[5]); - break; - } - - section = elf_getscn(elf, ++secIdx); - } // if section found - - } - elf_end(elf); - return new ElfObject(fname, fd, len, data, global_ptr,arch, opSys); + return new ElfObject(fname, fd, len, data, arch, opSys); } } ElfObject::ElfObject(const string &_filename, int _fd, - size_t _len, uint8_t *_data,Addr global_ptr, + size_t _len, uint8_t *_data, Arch _arch, OpSys _opSys) : ObjectFile(_filename, _fd, _len, _data, _arch, _opSys) @@ -222,7 +188,6 @@ ElfObject::ElfObject(const string &_filename, int _fd, entry = ehdr.e_entry; - globalPtr = global_ptr; // initialize segment sizes to 0 in case they're not present text.size = data.size = bss.size = 0; diff --git a/base/loader/elf_object.hh b/base/loader/elf_object.hh index d1fd32fd0..72c265edd 100644 --- a/base/loader/elf_object.hh +++ b/base/loader/elf_object.hh @@ -39,7 +39,7 @@ class ElfObject : public ObjectFile bool loadSomeSymbols(SymbolTable *symtab, int binding); ElfObject(const std::string &_filename, int _fd, - size_t _len, uint8_t *_data,Addr global_ptr, + size_t _len, uint8_t *_data, Arch _arch, OpSys _opSys); public: