MIPS: Always compile in setExceptionState, including in SE mode.
Also fix the newly exposed and preexisting compile errors. This code hasn't been exposed in a while, and it's not up to date with the rest of gem5.
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48b6636d01
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7d19ff170d
2 changed files with 16 additions and 25 deletions
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@ -97,15 +97,6 @@ template <> FaultVals MipsFault<TLBModifiedFault>::vals =
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template <> FaultVals MipsFault<DspStateDisabledFault>::vals =
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{ "DSP Disabled Fault", 0x001a };
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#if FULL_SYSTEM
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void
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MipsFaultBase::setHandlerPC(Addr HandlerBase, ThreadContext *tc)
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{
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tc->setPC(HandlerBase);
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tc->setNextPC(HandlerBase + sizeof(MachInst));
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tc->setNextNPC(HandlerBase + 2 * sizeof(MachInst));
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}
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void
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MipsFaultBase::setExceptionState(ThreadContext *tc, uint8_t excCode)
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{
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@ -124,29 +115,29 @@ MipsFaultBase::setExceptionState(ThreadContext *tc, uint8_t excCode)
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tc->setMiscRegNoEffect(MISCREG_STATUS, status);
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// write EPC
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// CHECK ME or FIXME or FIX ME or POSSIBLE HACK
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// Check to see if the exception occurred in the branch delay slot
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DPRINTF(MipsPRA, "PC: %x, NextPC: %x, NNPC: %x\n",
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tc->readPC(), tc->readNextPC(), tc->readNextNPC());
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int bd = 0;
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if (tc->readPC() + sizeof(MachInst) != tc->readNextPC()) {
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tc->setMiscRegNoEffect(MISCREG_EPC, tc->readPC() - sizeof(MachInst));
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// In the branch delay slot? set CAUSE_31
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bd = 1;
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} else {
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tc->setMiscRegNoEffect(MISCREG_EPC, tc->readPC());
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// In the branch delay slot? reset CAUSE_31
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bd = 0;
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}
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PCState pc = tc->pcState();
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DPRINTF(MipsPRA, "PC: %s\n", pc);
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bool delay_slot = pc.pc() + sizeof(MachInst) != pc.npc();
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tc->setMiscRegNoEffect(MISCREG_EPC,
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pc.pc() - delay_slot ? sizeof(MachInst) : 0);
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// Set Cause_EXCCODE field
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CauseReg cause = tc->readMiscReg(MISCREG_CAUSE);
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cause.excCode = excCode;
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cause.bd = bd;
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cause.bd = delay_slot ? 1 : 0;
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cause.ce = 0;
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tc->setMiscRegNoEffect(MISCREG_CAUSE, cause);
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}
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#if FULL_SYSTEM
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void
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MipsFaultBase::setHandlerPC(Addr HandlerBase, ThreadContext *tc)
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{
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tc->setPC(HandlerBase);
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tc->setNextPC(HandlerBase + sizeof(MachInst));
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tc->setNextNPC(HandlerBase + 2 * sizeof(MachInst));
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}
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void
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IntegerOverflowFault::invoke(ThreadContext *tc, StaticInstPtr inst)
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{
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@ -62,9 +62,9 @@ class MipsFaultBase : public FaultBase
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void invoke(ThreadContext * tc,
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StaticInst::StaticInstPtr inst = StaticInst::nullStaticInstPtr)
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{}
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void setExceptionState(ThreadContext *, uint8_t);
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void setHandlerPC(Addr, ThreadContext *);
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#endif
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void setExceptionState(ThreadContext *, uint8_t);
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};
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template <typename T>
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