ruby: removed all refs to old RubyConfig
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@ -32,7 +32,6 @@
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*/
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*/
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#include "mem/ruby/buffers/MessageBuffer.hh"
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#include "mem/ruby/buffers/MessageBuffer.hh"
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#include "mem/ruby/config/RubyConfig.hh"
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#include "mem/ruby/system/System.hh"
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#include "mem/ruby/system/System.hh"
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MessageBuffer::MessageBuffer()
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MessageBuffer::MessageBuffer()
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@ -323,7 +322,6 @@ void MessageBuffer::clear()
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void MessageBuffer::recycle()
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void MessageBuffer::recycle()
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{
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{
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// const int RubyConfig::getRecycleLatency() = 3;
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DEBUG_MSG(QUEUE_COMP,MedPrio,"recycling " + m_name);
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DEBUG_MSG(QUEUE_COMP,MedPrio,"recycling " + m_name);
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assert(isReady());
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assert(isReady());
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MessageBufferNode node = m_prio_heap.extractMin();
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MessageBufferNode node = m_prio_heap.extractMin();
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@ -107,16 +107,6 @@ private:
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inline
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inline
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Address line_address(const Address& addr) { Address temp(addr); temp.makeLineAddress(); return temp; }
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Address line_address(const Address& addr) { Address temp(addr); temp.makeLineAddress(); return temp; }
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/*
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inline
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Address next_stride_address(const Address& addr, int stride) {
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Address temp = addr;
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temp.makeNextStrideAddress(stride);
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temp.setAddress(temp.maskHighOrderBits(ADDRESS_WIDTH-RubyConfig::memorySizeBits())); // surpress wrap-around problem
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return temp;
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}
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*/
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// Output operator declaration
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// Output operator declaration
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ostream& operator<<(ostream& out, const Address& obj);
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ostream& operator<<(ostream& out, const Address& obj);
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// comparison operator declaration
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// comparison operator declaration
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@ -207,17 +197,6 @@ integer_t Address::memoryModuleIndex() const
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{
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{
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integer_t index = bitSelect(RubySystem::getBlockSizeBits()+RubySystem::getMemorySizeBits(), ADDRESS_WIDTH);
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integer_t index = bitSelect(RubySystem::getBlockSizeBits()+RubySystem::getMemorySizeBits(), ADDRESS_WIDTH);
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assert (index >= 0);
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assert (index >= 0);
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/*
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if (index >= RubyConfig::memoryModuleBlocks()) {
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cerr << " memoryBits: " << RubySystem::getMemorySizeBits() << " memorySizeBits: " << RubySystem::getMemorySizeBits()
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<< " Address: " << "[" << hex << "0x" << m_address << "," << " line 0x" << maskLowOrderBits(RubySystem::getBlockSizeBits()) << dec << "]" << flush
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<< "error: limit exceeded. " <<
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" getDataBlockBits: " << RubySystem::getBlockSizeBits() <<
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" memoryModuleBlocks: " << RubyConfig::memoryModuleBlocks() <<
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" index: " << index << endl;
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}
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assert (index < RubyConfig::memoryModuleBlocks());
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*/
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return index;
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return index;
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// Index indexHighPortion = address.bitSelect(MEMORY_SIZE_BITS-1, PAGE_SIZE_BITS+NUMBER_OF_MEMORY_MODULE_BITS);
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// Index indexHighPortion = address.bitSelect(MEMORY_SIZE_BITS-1, PAGE_SIZE_BITS+NUMBER_OF_MEMORY_MODULE_BITS);
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@ -37,7 +37,6 @@
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*/
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*/
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#include "mem/ruby/common/NetDest.hh"
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#include "mem/ruby/common/NetDest.hh"
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#include "mem/ruby/config/RubyConfig.hh"
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#include "mem/protocol/Protocol.hh"
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#include "mem/protocol/Protocol.hh"
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NetDest::NetDest()
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NetDest::NetDest()
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@ -48,7 +48,6 @@
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#include "mem/gems_common/Vector.hh"
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#include "mem/gems_common/Vector.hh"
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#include "mem/ruby/system/NodeID.hh"
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#include "mem/ruby/system/NodeID.hh"
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#include "mem/ruby/system/MachineID.hh"
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#include "mem/ruby/system/MachineID.hh"
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#include "mem/ruby/config/RubyConfig.hh"
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#include "mem/ruby/common/Set.hh"
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#include "mem/ruby/common/Set.hh"
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#include "mem/protocol/MachineType.hh"
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#include "mem/protocol/MachineType.hh"
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@ -41,7 +41,6 @@
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#include "mem/ruby/common/Set.hh"
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#include "mem/ruby/common/Set.hh"
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#include "mem/ruby/system/System.hh"
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#include "mem/ruby/system/System.hh"
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#include "mem/ruby/config/RubyConfig.hh"
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#if __amd64__ || __LP64__
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#if __amd64__ || __LP64__
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#define __64BITS__
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#define __64BITS__
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@ -512,7 +511,7 @@ void Set::setSize(int size)
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#endif // __32BITS__
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#endif // __32BITS__
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// decide whether to use dynamic or static alloction
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// decide whether to use dynamic or static alloction
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if(m_nArrayLen<=NUMBER_WORDS_PER_SET) { // constant defined in RubyConfig.hh
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if(m_nArrayLen<=NUMBER_WORDS_PER_SET) { // constant defined in RubySystem.hh
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// its OK to use the static allocation, and it will
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// its OK to use the static allocation, and it will
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// probably be faster (as m_nArrayLen is already in the
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// probably be faster (as m_nArrayLen is already in the
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// cache and they will probably share the same cache line)
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// cache and they will probably share the same cache line)
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@ -45,10 +45,10 @@
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#ifndef SET_H
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#ifndef SET_H
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#define SET_H
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#define SET_H
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#include "mem/ruby/system/System.hh"
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#include "mem/ruby/common/Global.hh"
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#include "mem/ruby/common/Global.hh"
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#include "mem/gems_common/Vector.hh"
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#include "mem/gems_common/Vector.hh"
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#include "mem/ruby/system/NodeID.hh"
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#include "mem/ruby/system/NodeID.hh"
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#include "mem/ruby/config/RubyConfig.hh"
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// gibson 05/20/05
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// gibson 05/20/05
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// enum PresenceBit {NotPresent, Present};
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// enum PresenceBit {NotPresent, Present};
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@ -37,7 +37,6 @@
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#include "mem/ruby/common/Global.hh"
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#include "mem/ruby/common/Global.hh"
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#include "mem/ruby/common/Address.hh"
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#include "mem/ruby/common/Address.hh"
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#include "mem/ruby/config/RubyConfig.hh"
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#include "mem/ruby/common/DataBlock.hh"
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#include "mem/ruby/common/DataBlock.hh"
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#include "mem/gems_common/Vector.hh"
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#include "mem/gems_common/Vector.hh"
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@ -1,250 +0,0 @@
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/*
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* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* RubyConfig.cc
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*
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* Description: See RubyConfig.hh
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*
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* $Id$
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*
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*/
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#include "mem/ruby/config/RubyConfig.hh"
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//#include "mem/protocol/protocol_name.hh"
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#include "mem/gems_common/util.hh"
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#define CONFIG_DEF_FILE "mem/ruby/config/config.hh"
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#define ERROR_MSG(MESSAGE)\
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{\
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cerr << "Fatal Error: in fn "\
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<< __PRETTY_FUNCTION__ << " in "\
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<< __FILE__ << ":"\
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<< __LINE__ << ": "\
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<< (MESSAGE) << endl << flush;\
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abort();\
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}
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// declare all configuration variables
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#define PARAM_BOOL( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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bool RubyConfig::m_##NAME = DEFAULT_VALUE;
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#define PARAM_STRING( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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const char* RubyConfig::m_##NAME = DEFAULT_VALUE;
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#define PARAM_ULONG( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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uint64 RubyConfig::m_##NAME = DEFAULT_VALUE;
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#define PARAM( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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int RubyConfig::m_##NAME = DEFAULT_VALUE;
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#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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TYPE* RubyConfig::m_##NAME = NULL;
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#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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TYPE** RubyConfig::m_##NAME = NULL;
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#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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TYPE*** RubyConfig::m_##NAME = NULL;
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#include CONFIG_DEF_FILE
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#undef PARAM_BOOL
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#undef PARAM_STRING
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#undef PARAM_ULONG
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#undef PARAM
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#undef PARAM_ARRAY
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#undef PARAM_ARRAY2D
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#undef PARAM_ARRAY3D
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#define CHECK_POWER_OF_2(N) { if (!is_power_of_2(N)) { ERROR_MSG(#N " must be a power of 2."); }}
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#define CHECK_ZERO(N) { if (N != 0) { ERROR_MSG(#N " must be zero at initialization."); }}
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#define CHECK_NON_ZERO(N) { if (N == 0) { ERROR_MSG(#N " must be non-zero."); }}
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uint32 RubyConfig::m_data_block_mask;
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void RubyConfig::reset()
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{
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#define PARAM_BOOL( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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m_##NAME = DEFAULT_VALUE;
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#define PARAM_STRING( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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m_##NAME = DEFAULT_VALUE;
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#define PARAM_ULONG( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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m_##NAME = DEFAULT_VALUE;
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#define PARAM( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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m_##NAME = DEFAULT_VALUE;
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#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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m_##NAME = new TYPE[DEFAULT_ARRAY_SIZE]; \
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for (int i=0; i<DEFAULT_ARRAY_SIZE; i++) \
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m_##NAME[i] = DEFAULT_VALUE;
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#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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m_##NAME = new TYPE*[D1_DEFAULT_ARRAY_SIZE]; \
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for (int i=0; i<D1_DEFAULT_ARRAY_SIZE; i++) { \
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m_##NAME[i] = new TYPE[D2_DEFAULT_ARRAY_SIZE]; \
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for (int j=0; j<D2_DEFAULT_ARRAY_SIZE; j++) \
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m_##NAME[i][j] = DEFAULT_VALUE; \
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}
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#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
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m_##NAME = new TYPE**[D1_DEFAULT_ARRAY_SIZE]; \
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for (int i=0; i<D1_DEFAULT_ARRAY_SIZE; i++) { \
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m_##NAME[i] = new TYPE*[D2_DEFAULT_ARRAY_SIZE]; \
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for (int j=0; j<D2_DEFAULT_ARRAY_SIZE; j++) { \
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m_##NAME[i][j] = new TYPE[D3_DEFAULT_ARRAY_SIZE]; \
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for (int k=0; k<D3_DEFAULT_ARRAY_SIZE; k++) \
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m_##NAME[i][j][k] = DEFUALT_VALUE; \
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} \
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}
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#include CONFIG_DEF_FILE
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#undef PARAM_BOOL
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#undef PARAM_STRING
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#undef PARAM_ULONG
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#undef PARAM
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#undef PARAM_ARRAY
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#undef PARAM_ARRAY2D
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#undef PARAM_ARRAY3D
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}
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void RubyConfig::init()
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{
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/*
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// MemoryControl:
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CHECK_NON_ZERO(m_MEM_BUS_CYCLE_MULTIPLIER);
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CHECK_NON_ZERO(m_BANKS_PER_RANK);
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CHECK_NON_ZERO(m_RANKS_PER_DIMM);
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CHECK_NON_ZERO(m_DIMMS_PER_CHANNEL);
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CHECK_NON_ZERO(m_BANK_QUEUE_SIZE);
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CHECK_NON_ZERO(m_BankBusyTime);
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CHECK_NON_ZERO(m_MEM_CTL_LATENCY);
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CHECK_NON_ZERO(m_REFRESH_PERIOD);
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CHECK_NON_ZERO(m_BASIC_BUS_BUSY_TIME);
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CHECK_POWER_OF_2(m_BANKS_PER_RANK);
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CHECK_POWER_OF_2(m_RANKS_PER_DIMM);
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CHECK_POWER_OF_2(m_DIMMS_PER_CHANNEL);
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CHECK_NON_ZERO(m_MemorySizeBytes);
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// CHECK_NON_ZERO(m_DATA_BLOCK_BYTES);
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CHECK_NON_ZERO(m_NUM_PROCESSORS);
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CHECK_NON_ZERO(m_ProcsPerChip);
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if (m_NUM_L2_BANKS == 0) { // defaults to number of ruby nodes
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m_NUM_L2_BANKS = m_NUM_PROCESSORS;
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}
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if (m_NUM_MEMORIES == 0) { // defaults to number of ruby nodes
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m_NUM_MEMORIES = m_NUM_PROCESSORS;
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}
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CHECK_ZERO(m_MEMORY_SIZE_BITS);
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CHECK_ZERO(m_NUM_PROCESSORS_BITS);
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CHECK_ZERO(m_NUM_CHIP_BITS);
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CHECK_ZERO(m_NUM_L2_BANKS_BITS);
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CHECK_ZERO(m_NUM_MEMORIES_BITS);
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CHECK_ZERO(m_PROCS_PER_CHIP_BITS);
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CHECK_ZERO(m_NUM_L2_BANKS_PER_CHIP);
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CHECK_ZERO(m_NUM_L2_BANKS_PER_CHIP_BITS);
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CHECK_ZERO(m_NUM_MEMORIES_BITS);
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CHECK_ZERO(m_MEMORY_MODULE_BLOCKS);
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CHECK_ZERO(m_MEMORY_MODULE_BITS);
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CHECK_ZERO(m_NUM_MEMORIES_PER_CHIP);
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CHECK_POWER_OF_2(m_MemorySizeBytes);
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CHECK_POWER_OF_2(m_NUM_PROCESSORS);
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CHECK_POWER_OF_2(m_NUM_L2_BANKS);
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CHECK_POWER_OF_2(m_NUM_MEMORIES);
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CHECK_POWER_OF_2(m_ProcsPerChip);
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assert(m_NUM_PROCESSORS >= m_ProcsPerChip); // obviously can't have less processors than procs/chip
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m_NUM_CHIPS = m_NUM_PROCESSORS/m_ProcsPerChip;
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assert(m_NUM_L2_BANKS >= m_NUM_CHIPS); // cannot have a single L2cache across multiple chips
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m_NUM_L2_BANKS_PER_CHIP = m_NUM_L2_BANKS/m_NUM_CHIPS;
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if (m_NUM_CHIPS > m_NUM_MEMORIES) {
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m_NUM_MEMORIES_PER_CHIP = 1; // some chips have a memory, others don't
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} else {
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m_NUM_MEMORIES_PER_CHIP = m_NUM_MEMORIES/m_NUM_CHIPS;
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}
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m_NUM_CHIP_BITS = log_int(m_NUM_CHIPS);
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m_MEMORY_SIZE_BITS = log_int(m_MemorySizeBytes);
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m_data_block_mask = ~ (~0 << m_DATA_BLOCK_BITS);
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m_NUM_PROCESSORS_BITS = log_int(m_NUM_PROCESSORS);
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m_NUM_L2_BANKS_BITS = log_int(m_NUM_L2_BANKS);
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m_NUM_L2_BANKS_PER_CHIP_BITS = log_int(m_NUM_L2_BANKS_PER_CHIP);
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m_NUM_MEMORIES_BITS = log_int(m_NUM_MEMORIES);
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m_PROCS_PER_CHIP_BITS = log_int(m_ProcsPerChip);
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|
||||||
m_MEMORY_MODULE_BITS = m_MEMORY_SIZE_BITS - m_DATA_BLOCK_BITS - m_NUM_MEMORIES_BITS;
|
|
||||||
m_MEMORY_MODULE_BLOCKS = (int64(1) << m_MEMORY_MODULE_BITS);
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
// Randomize the execution
|
|
||||||
// srandom(m_RandomSeed);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void print_parameters(ostream& out)
|
|
||||||
{
|
|
||||||
|
|
||||||
#define print_true(NAME)
|
|
||||||
#define print_false(NAME) \
|
|
||||||
out << #NAME << ": " << RubyConfig::get##NAME () << endl
|
|
||||||
|
|
||||||
#define PARAM(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
|
|
||||||
#define PARAM_UINT(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
|
|
||||||
#define PARAM_ULONG(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
|
|
||||||
#define PARAM_BOOL(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
|
|
||||||
#define PARAM_DOUBLE(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
|
|
||||||
#define PARAM_STRING(NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR) { print_##CUSTOM_ACCESSOR(NAME); }
|
|
||||||
#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) { out << #NAME << ": ARRAY" << endl; }
|
|
||||||
#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) { out << #NAME << ": ARRAY2D" << endl; }
|
|
||||||
#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) { out << #NAME << ": ARRAY3D" << endl; }
|
|
||||||
#include "mem/ruby/config/config.hh"
|
|
||||||
#undef PARAM
|
|
||||||
#undef PARAM_UINT
|
|
||||||
#undef PARAM_ULONG
|
|
||||||
#undef PARAM_BOOL
|
|
||||||
#undef PARAM_DOUBLE
|
|
||||||
#undef PARAM_STRING
|
|
||||||
#undef PARAM_ARRAY
|
|
||||||
#undef PARAM_ARRAY2D
|
|
||||||
#undef PARAM_ARRAY3D
|
|
||||||
}
|
|
||||||
|
|
||||||
void RubyConfig::printConfiguration(ostream& out) {
|
|
||||||
out << "Ruby Configuration" << endl;
|
|
||||||
out << "------------------" << endl;
|
|
||||||
|
|
||||||
//out << "protocol: " << CURRENT_PROTOCOL << endl;
|
|
||||||
out << "compiled_at: " << __TIME__ << ", " << __DATE__ << endl;
|
|
||||||
// out << "RUBY_DEBUG: " << bool_to_string(RUBY_DEBUG) << endl;
|
|
||||||
|
|
||||||
char buffer[100];
|
|
||||||
gethostname(buffer, 50);
|
|
||||||
out << "hostname: " << buffer << endl;
|
|
||||||
|
|
||||||
print_parameters(out);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
|
@ -1,229 +0,0 @@
|
||||||
|
|
||||||
/*
|
|
||||||
* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without
|
|
||||||
* modification, are permitted provided that the following conditions are
|
|
||||||
* met: redistributions of source code must retain the above copyright
|
|
||||||
* notice, this list of conditions and the following disclaimer;
|
|
||||||
* redistributions in binary form must reproduce the above copyright
|
|
||||||
* notice, this list of conditions and the following disclaimer in the
|
|
||||||
* documentation and/or other materials provided with the distribution;
|
|
||||||
* neither the name of the copyright holders nor the names of its
|
|
||||||
* contributors may be used to endorse or promote products derived from
|
|
||||||
* this software without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* RubyConfig.hh
|
|
||||||
*
|
|
||||||
* Description: This class has only static members and class methods,
|
|
||||||
* and thus should never need to be instantiated.
|
|
||||||
*
|
|
||||||
* $Id$
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef RUBYCONFIG_H
|
|
||||||
#define RUBYCONFIG_H
|
|
||||||
|
|
||||||
#include <cstdlib>
|
|
||||||
#include <string>
|
|
||||||
#include <ostream>
|
|
||||||
#include <assert.h>
|
|
||||||
|
|
||||||
#include "mem/ruby/common/TypeDefines.hh"
|
|
||||||
|
|
||||||
// Set paramterization
|
|
||||||
/*
|
|
||||||
* This defines the number of longs (32-bits on 32 bit machines,
|
|
||||||
* 64-bit on 64-bit AMD machines) to use to hold the set...
|
|
||||||
* the default is 4, allowing 128 or 256 different members
|
|
||||||
* of the set.
|
|
||||||
*
|
|
||||||
* This should never need to be changed for correctness reasons,
|
|
||||||
* though increasing it will increase performance for larger
|
|
||||||
* set sizes at the cost of a (much) larger memory footprint
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
const int NUMBER_WORDS_PER_SET = 4;
|
|
||||||
|
|
||||||
using namespace std;
|
|
||||||
|
|
||||||
class RubyConfig {
|
|
||||||
public:
|
|
||||||
|
|
||||||
// CACHE BLOCK CONFIG VARIBLES
|
|
||||||
static uint32 dataBlockMask() { return m_data_block_mask; }
|
|
||||||
|
|
||||||
static int numberOfDMA() { return 1; }
|
|
||||||
static int numberOfDMAPerChip() { return 1; }
|
|
||||||
static int DMATransitionsPerCycle() { return 1; }
|
|
||||||
|
|
||||||
// SUPPORTED PHYSICAL MEMORY CONFIG VARIABLES
|
|
||||||
// static int memoryModuleBits() { return m_MEMORY_MODULE_BITS; }
|
|
||||||
// static int64 memoryModuleBlocks() { return m_MEMORY_MODULE_BLOCKS; }
|
|
||||||
|
|
||||||
// defines the number of simics processors (power of 2)
|
|
||||||
// static int numberOfProcessors() { return m_NUM_PROCESSORS; }
|
|
||||||
// static int procsPerChipBits() { return m_PROCS_PER_CHIP_BITS; }
|
|
||||||
// static int numberOfProcsPerChip() { return m_ProcsPerChip; }
|
|
||||||
// static int numberOfChips() { return m_NUM_CHIPS; }
|
|
||||||
|
|
||||||
// MACHINE INSTANIATION CONFIG VARIABLES
|
|
||||||
// -------------------------------------
|
|
||||||
// L1 CACHE MACHINES
|
|
||||||
// defines the number of L1banks - idependent of ruby chips (power of 2)
|
|
||||||
// NOTE - no protocols currently supports L1s != processors, just a placeholder
|
|
||||||
|
|
||||||
// DIRECTORY/MEMORY MACHINES
|
|
||||||
// defines the number of ruby memories - idependent of ruby chips (power of 2)
|
|
||||||
// static int memoryBits() { return m_NUM_MEMORIES_BITS; }
|
|
||||||
// static int numberOfDirectory() { return numberOfMemories(); }
|
|
||||||
// static int numberOfMemories() { return m_NUM_MEMORIES; }
|
|
||||||
// static int numberOfDirectoryPerChip() { return m_NUM_MEMORIES_PER_CHIP; }
|
|
||||||
// static int DirectoryTransitionsPerCycle() { return m_DIRECTORY_TRANSITIONS_PER_RUBY_CYCLE; }
|
|
||||||
|
|
||||||
// ---- END MACHINE SPECIFIC VARIABLES ----
|
|
||||||
|
|
||||||
// VARIABLE MEMORY RESPONSE LATENCY
|
|
||||||
// *** NOTE *** This is where variation is added to the simulation
|
|
||||||
// see Alameldeen et al. HPCA 2003 for further details
|
|
||||||
// static int getMemoryLatency() { return m_MEMORY_RESPONSE_LATENCY_MINUS_2+(random() % 5); }
|
|
||||||
|
|
||||||
static void reset();
|
|
||||||
static void init();
|
|
||||||
static void printConfiguration(std::ostream& out);
|
|
||||||
|
|
||||||
// Memory Controller
|
|
||||||
|
|
||||||
// static int memBusCycleMultiplier () { return m_MEM_BUS_CYCLE_MULTIPLIER; }
|
|
||||||
/* static int banksPerRank () { return m_BANKS_PER_RANK; }
|
|
||||||
static int ranksPerDimm () { return m_RANKS_PER_DIMM; }
|
|
||||||
static int dimmsPerChannel () { return m_DIMMS_PER_CHANNEL; }
|
|
||||||
static int bankBit0 () { return m_BANK_BIT_0; }
|
|
||||||
static int rankBit0 () { return m_RANK_BIT_0; }
|
|
||||||
static int dimmBit0 () { return m_DIMM_BIT_0; }
|
|
||||||
static int bankQueueSize () { return m_BANK_QUEUE_SIZE; }
|
|
||||||
static int bankBusyTime () { return m_BankBusyTime; }
|
|
||||||
static int rankRankDelay () { return m_RANK_RANK_DELAY; }
|
|
||||||
static int readWriteDelay () { return m_READ_WRITE_DELAY; }
|
|
||||||
static int basicBusBusyTime () { return m_BASIC_BUS_BUSY_TIME; }
|
|
||||||
static int memCtlLatency () { return m_MEM_CTL_LATENCY; }
|
|
||||||
static int refreshPeriod () { return m_REFRESH_PERIOD; }
|
|
||||||
static int tFaw () { return m_TFAW; }
|
|
||||||
static int memRandomArbitrate () { return m_MEM_RANDOM_ARBITRATE; }
|
|
||||||
static int memFixedDelay () { return m_MEM_FIXED_DELAY; }
|
|
||||||
*/
|
|
||||||
/* cache accessors */
|
|
||||||
static int getCacheIDFromParams(int level, int num, string split_type) {
|
|
||||||
// TODO: this function
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define accessor_true( TYPE, NAME )
|
|
||||||
#define accessor_false( TYPE, NAME ) \
|
|
||||||
static TYPE get##NAME() { return m_##NAME; } \
|
|
||||||
static void set##NAME(TYPE val) { m_##NAME = val; }
|
|
||||||
|
|
||||||
#define array_accessor_true( TYPE, NAME, DEFAULT_ARRAY_SIZE )
|
|
||||||
#define array_accessor_false( TYPE, NAME, DEFAULT_ARRAY_SIZE ) \
|
|
||||||
static TYPE get##NAME(int idx) { \
|
|
||||||
assert(m_##NAME != NULL); \
|
|
||||||
return m_##NAME[idx]; \
|
|
||||||
} \
|
|
||||||
static void set##NAME(int idx, TYPE val) { \
|
|
||||||
if(m_##NAME == NULL) { \
|
|
||||||
assert(DEFAULT_ARRAY_SIZE > 0); \
|
|
||||||
m_##NAME = new TYPE[DEFAULT_ARRAY_SIZE]; \
|
|
||||||
} \
|
|
||||||
m_##NAME[idx] = val; \
|
|
||||||
}
|
|
||||||
|
|
||||||
#define array2d_accessor_true( TYPE, NAME )
|
|
||||||
#define array2d_accessor_false( TYPE, NAME ) \
|
|
||||||
static TYPE get##NAME(int idx1, int idx2) { return m_##NAME[idx1][idx2]; } \
|
|
||||||
static void set##NAME(int idx1, int idx2, TYPE val) { m_##NAME[idx1][idx2] = val; }
|
|
||||||
|
|
||||||
#define array3d_accessor_true( TYPE, NAME )
|
|
||||||
#define array3d_accessor_false( TYPE, NAME ) \
|
|
||||||
static TYPE get##NAME(int idx1, int idx2, int idx3) { return m_##NAME[idx1][idx2][idx3]; } \
|
|
||||||
static void set##NAME(int idx1, int idx2, int idx3, TYPE val) { m_##NAME[idx1][idx2][idx3] = val; }
|
|
||||||
|
|
||||||
#define PARAM( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
accessor_##CUSTOM_ACCESSOR(int32,NAME)
|
|
||||||
#define PARAM_UINT( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
accessor_##CUSTOM_ACCESSOR(uint32,NAME)
|
|
||||||
#define PARAM_ULONG( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
accessor_##CUSTOM_ACCESSOR(uint64,NAME)
|
|
||||||
#define PARAM_BOOL( NAME, DEFAULT_VALUE,CUSTOM_ACCESSOR ) \
|
|
||||||
accessor_##CUSTOM_ACCESSOR(bool,NAME)
|
|
||||||
#define PARAM_DOUBLE( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
accessor_##CUSTOM_ACCESSOR(double,NAME)
|
|
||||||
#define PARAM_STRING( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
accessor_##CUSTOM_ACCESSOR(const char*,NAME)
|
|
||||||
#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
array_accessor_##CUSTOM_ACCESSOR(TYPE, NAME, DEFAULT_ARRAY_SIZE)
|
|
||||||
#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
array2d_accessor_##CUSTOM_ACCESSOR(TYPE, NAME)
|
|
||||||
#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
array3d_accessor_##CUSTOM_ACCESSOR(TYPE, NAME)
|
|
||||||
#include "mem/ruby/config/config.hh"
|
|
||||||
#undef PARAM
|
|
||||||
#undef PARAM_UINT
|
|
||||||
#undef PARAM_ULONG
|
|
||||||
#undef PARAM_BOOL
|
|
||||||
#undef PARAM_DOUBLE
|
|
||||||
#undef PARAM_STRING
|
|
||||||
#undef PARAM_ARRAY
|
|
||||||
#undef PARAM_ARRAY2D
|
|
||||||
#undef PARAM_ARRAY3D
|
|
||||||
|
|
||||||
private:
|
|
||||||
static uint32 m_data_block_mask;
|
|
||||||
|
|
||||||
#define PARAM( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static int32 m_##NAME;
|
|
||||||
#define PARAM_UINT( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static uint32 m_##NAME;
|
|
||||||
#define PARAM_ULONG( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static uint64 m_##NAME;
|
|
||||||
#define PARAM_BOOL( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static bool m_##NAME;
|
|
||||||
#define PARAM_DOUBLE( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static double m_##NAME;
|
|
||||||
#define PARAM_STRING( NAME, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static const char *m_##NAME;
|
|
||||||
#define PARAM_ARRAY( NAME, TYPE, DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static TYPE* m_##NAME;
|
|
||||||
#define PARAM_ARRAY2D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static TYPE** m_##NAME;
|
|
||||||
#define PARAM_ARRAY3D( NAME, TYPE, D1_DEFAULT_ARRAY_SIZE, D2_DEFAULT_ARRAY_SIZE, D3_DEFAULT_ARRAY_SIZE, DEFAULT_VALUE, CUSTOM_ACCESSOR ) \
|
|
||||||
static TYPE*** m_##NAME;
|
|
||||||
#include "mem/ruby/config/config.hh"
|
|
||||||
#undef PARAM
|
|
||||||
#undef PARAM_UINT
|
|
||||||
#undef PARAM_ULONG
|
|
||||||
#undef PARAM_BOOL
|
|
||||||
#undef PARAM_DOUBLE
|
|
||||||
#undef PARAM_STRING
|
|
||||||
#undef PARAM_ARRAY
|
|
||||||
#undef PARAM_ARRAY2D
|
|
||||||
#undef PARAM_ARRAY3D
|
|
||||||
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif //RUBYCONFIG_H
|
|
|
@ -32,7 +32,6 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
|
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Consumer.hh"
|
#include "mem/ruby/common/Consumer.hh"
|
||||||
#include "mem/ruby/profiler/Profiler.hh"
|
#include "mem/ruby/profiler/Profiler.hh"
|
||||||
#include "mem/ruby/system/System.hh"
|
#include "mem/ruby/system/System.hh"
|
||||||
|
|
|
@ -39,7 +39,6 @@
|
||||||
#define ABSTRACT_BLOOM_FILTER_H
|
#define ABSTRACT_BLOOM_FILTER_H
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
|
|
||||||
class AbstractBloomFilter {
|
class AbstractBloomFilter {
|
||||||
|
|
|
@ -40,7 +40,6 @@
|
||||||
|
|
||||||
#include "mem/gems_common/Map.hh"
|
#include "mem/gems_common/Map.hh"
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
||||||
|
|
||||||
|
|
|
@ -40,7 +40,6 @@
|
||||||
|
|
||||||
#include "mem/gems_common/Map.hh"
|
#include "mem/gems_common/Map.hh"
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
||||||
|
|
||||||
|
|
|
@ -36,7 +36,6 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
|
|
||||||
#include "mem/ruby/filters/GenericBloomFilter.hh"
|
#include "mem/ruby/filters/GenericBloomFilter.hh"
|
||||||
|
|
|
@ -39,7 +39,6 @@
|
||||||
#define GENERIC_BLOOM_FILTER_H
|
#define GENERIC_BLOOM_FILTER_H
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
||||||
|
|
||||||
|
|
|
@ -42,7 +42,6 @@
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/system/System.hh"
|
#include "mem/ruby/system/System.hh"
|
||||||
#include "mem/ruby/profiler/Profiler.hh"
|
#include "mem/ruby/profiler/Profiler.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
||||||
|
|
||||||
|
|
|
@ -40,7 +40,6 @@
|
||||||
|
|
||||||
#include "mem/gems_common/Map.hh"
|
#include "mem/gems_common/Map.hh"
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
||||||
|
|
||||||
|
|
|
@ -42,7 +42,6 @@
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/system/System.hh"
|
#include "mem/ruby/system/System.hh"
|
||||||
#include "mem/ruby/profiler/Profiler.hh"
|
#include "mem/ruby/profiler/Profiler.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
||||||
|
|
||||||
|
|
|
@ -40,7 +40,6 @@
|
||||||
|
|
||||||
#include "mem/gems_common/Map.hh"
|
#include "mem/gems_common/Map.hh"
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
||||||
|
|
||||||
|
|
|
@ -40,7 +40,6 @@
|
||||||
|
|
||||||
#include "mem/gems_common/Map.hh"
|
#include "mem/gems_common/Map.hh"
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
#include "mem/ruby/filters/AbstractBloomFilter.hh"
|
||||||
|
|
||||||
|
|
|
@ -50,7 +50,6 @@
|
||||||
#include "mem/ruby/system/NodeID.hh"
|
#include "mem/ruby/system/NodeID.hh"
|
||||||
#include "mem/protocol/MessageSizeType.hh"
|
#include "mem/protocol/MessageSizeType.hh"
|
||||||
#include "mem/ruby/system/System.hh"
|
#include "mem/ruby/system/System.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
|
|
||||||
class NetDest;
|
class NetDest;
|
||||||
class MessageBuffer;
|
class MessageBuffer;
|
||||||
|
|
|
@ -40,7 +40,6 @@
|
||||||
|
|
||||||
#include "mem/ruby/network/garnet-fixed-pipeline/NetworkHeader.hh"
|
#include "mem/ruby/network/garnet-fixed-pipeline/NetworkHeader.hh"
|
||||||
#include "mem/gems_common/util.hh"
|
#include "mem/gems_common/util.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
|
|
||||||
class NetworkConfig {
|
class NetworkConfig {
|
||||||
private:
|
private:
|
||||||
|
@ -65,80 +64,11 @@ class NetworkConfig {
|
||||||
m_using_network_testing = atoi(argv[i+1].c_str());
|
m_using_network_testing = atoi(argv[i+1].c_str());
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
// static bool isGarnetNetwork() {return RubyConfig::getUsingGarnetNetwork(); }
|
|
||||||
// static bool isDetailNetwork() {return RubyConfig::getUsingDetailNetwork(); }
|
|
||||||
bool isNetworkTesting() {return m_using_network_testing; }
|
bool isNetworkTesting() {return m_using_network_testing; }
|
||||||
int getFlitSize() {return m_flit_size; }
|
int getFlitSize() {return m_flit_size; }
|
||||||
int getNumPipeStages() {return m_number_of_pipe_stages; }
|
int getNumPipeStages() {return m_number_of_pipe_stages; }
|
||||||
int getVCsPerClass() {return m_vcs_per_class; }
|
int getVCsPerClass() {return m_vcs_per_class; }
|
||||||
int getBufferSize() {return m_buffer_size; }
|
int getBufferSize() {return m_buffer_size; }
|
||||||
// This is no longer used. See config/rubyconfig.defaults to set Garnet parameters.
|
|
||||||
static void readNetConfig()
|
|
||||||
{
|
|
||||||
/*
|
|
||||||
string filename = "network/garnet-flexible-pipeline/";
|
|
||||||
filename += NETCONFIG_DEFAULTS;
|
|
||||||
|
|
||||||
if (g_SIMICS) {
|
|
||||||
filename = "../../../ruby/"+filename;
|
|
||||||
}
|
|
||||||
ifstream NetconfigFile( filename.c_str(), ios::in);
|
|
||||||
if(!NetconfigFile.is_open())
|
|
||||||
{
|
|
||||||
cout << filename << endl;
|
|
||||||
cerr << "Network Configuration file cannot be opened\n";
|
|
||||||
exit(1);
|
|
||||||
}
|
|
||||||
|
|
||||||
string line = "";
|
|
||||||
|
|
||||||
while(!NetconfigFile.eof())
|
|
||||||
{
|
|
||||||
getline(NetconfigFile, line, '\n');
|
|
||||||
string var = string_split(line, ':');
|
|
||||||
|
|
||||||
if(!var.compare("RubyConfig::getUsingGarnetNetwork()"))
|
|
||||||
{
|
|
||||||
if(!line.compare("true"))
|
|
||||||
RubyConfig::getUsingGarnetNetwork() = true;
|
|
||||||
else
|
|
||||||
RubyConfig::getUsingGarnetNetwork() = false;
|
|
||||||
}
|
|
||||||
if(!var.compare("RubyConfig::getUsingDetailNetwork()"))
|
|
||||||
{
|
|
||||||
if(!line.compare("true"))
|
|
||||||
RubyConfig::getUsingDetailNetwork() = true;
|
|
||||||
else
|
|
||||||
RubyConfig::getUsingDetailNetwork() = false;
|
|
||||||
}
|
|
||||||
if(!var.compare("g_NETWORK_TESTING"))
|
|
||||||
{
|
|
||||||
if(!line.compare("true"))
|
|
||||||
g_NETWORK_TESTING = true;
|
|
||||||
else
|
|
||||||
g_NETWORK_TESTING = false;
|
|
||||||
}
|
|
||||||
if(!var.compare("RubyConfig::getFlitSize()"))
|
|
||||||
RubyConfig::getFlitSize() = atoi(line.c_str());
|
|
||||||
if(!var.compare("RubyConfig::getNumberOfPipeStages()"))
|
|
||||||
RubyConfig::getNumberOfPipeStages() = atoi(line.c_str());
|
|
||||||
if(!var.compare("RubyConfig::getVCSPerClass()"))
|
|
||||||
RubyConfig::getVCSPerClass() = atoi(line.c_str());
|
|
||||||
if(!var.compare("RubyConfig::getBufferSize()"))
|
|
||||||
RubyConfig::getBufferSize() = atoi(line.c_str());
|
|
||||||
}
|
|
||||||
NetconfigFile.close();
|
|
||||||
*/
|
|
||||||
/*
|
|
||||||
cout << "RubyConfig::getUsingGarnetNetwork() = " << RubyConfig::getUsingGarnetNetwork() << endl;
|
|
||||||
cout << "RubyConfig::getUsingDetailNetwork() = " << RubyConfig::getUsingDetailNetwork() << endl;
|
|
||||||
cout << "g_NETWORK_TESTING = " << g_NETWORK_TESTING << endl;
|
|
||||||
cout << "RubyConfig::getFlitSize() = " << RubyConfig::getFlitSize() << endl;
|
|
||||||
cout << "RubyConfig::getNumberOfPipeStages() = " << RubyConfig::getNumberOfPipeStages() << endl;
|
|
||||||
cout << "RubyConfig::getVCSPerClass()= " << RubyConfig::getVCSPerClass() << endl;
|
|
||||||
cout << "RubyConfig::getBufferSize() = " << RubyConfig::getBufferSize() << endl;
|
|
||||||
*/
|
|
||||||
}
|
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -88,9 +88,7 @@ void PerfectSwitch::addOutPort(const Vector<MessageBuffer*>& out, const NetDest&
|
||||||
m_out.insertAtBottom(out);
|
m_out.insertAtBottom(out);
|
||||||
m_routing_table.insertAtBottom(routing_table_entry);
|
m_routing_table.insertAtBottom(routing_table_entry);
|
||||||
|
|
||||||
// if (RubyConfig::getPrintTopology()) {
|
m_out_link_vec.insertAtBottom(out);
|
||||||
m_out_link_vec.insertAtBottom(out);
|
|
||||||
// }
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void PerfectSwitch::clearRoutingTables()
|
void PerfectSwitch::clearRoutingTables()
|
||||||
|
@ -187,7 +185,6 @@ void PerfectSwitch::wakeup()
|
||||||
assert(m_link_order.size() == m_routing_table.size());
|
assert(m_link_order.size() == m_routing_table.size());
|
||||||
assert(m_link_order.size() == m_out.size());
|
assert(m_link_order.size() == m_out.size());
|
||||||
//changed by SS
|
//changed by SS
|
||||||
// if (RubyConfig::getAdaptiveRouting()) {
|
|
||||||
if (m_network_ptr->getAdaptiveRouting()) {
|
if (m_network_ptr->getAdaptiveRouting()) {
|
||||||
if (m_network_ptr->isVNetOrdered(vnet)) {
|
if (m_network_ptr->isVNetOrdered(vnet)) {
|
||||||
// Don't adaptively route
|
// Don't adaptively route
|
||||||
|
|
|
@ -101,42 +101,7 @@ void SimpleNetwork::init(const vector<string> & argv)
|
||||||
}
|
}
|
||||||
m_topology_ptr->createLinks(false); // false because this isn't a reconfiguration
|
m_topology_ptr->createLinks(false); // false because this isn't a reconfiguration
|
||||||
}
|
}
|
||||||
/*
|
|
||||||
SimpleNetwork::SimpleNetwork(int nodes)
|
|
||||||
{
|
|
||||||
m_nodes = MachineType_base_number(MachineType_NUM);
|
|
||||||
|
|
||||||
m_virtual_networks = RubyConfig::getNumberOfVirtualNetworks();
|
|
||||||
m_endpoint_switches.setSize(m_nodes);
|
|
||||||
|
|
||||||
m_in_use.setSize(m_virtual_networks);
|
|
||||||
m_ordered.setSize(m_virtual_networks);
|
|
||||||
for (int i = 0; i < m_virtual_networks; i++) {
|
|
||||||
m_in_use[i] = false;
|
|
||||||
m_ordered[i] = false;
|
|
||||||
}
|
|
||||||
|
|
||||||
// Allocate to and from queues
|
|
||||||
m_toNetQueues.setSize(m_nodes);
|
|
||||||
m_fromNetQueues.setSize(m_nodes);
|
|
||||||
for (int node = 0; node < m_nodes; node++) {
|
|
||||||
m_toNetQueues[node].setSize(m_virtual_networks);
|
|
||||||
m_fromNetQueues[node].setSize(m_virtual_networks);
|
|
||||||
for (int j = 0; j < m_virtual_networks; j++) {
|
|
||||||
m_toNetQueues[node][j] = new MessageBuffer;
|
|
||||||
m_fromNetQueues[node][j] = new MessageBuffer;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// Setup the network switches
|
|
||||||
m_topology_ptr = new Topology(this, m_nodes);
|
|
||||||
int number_of_switches = m_topology_ptr->numSwitches();
|
|
||||||
for (int i=0; i<number_of_switches; i++) {
|
|
||||||
m_switch_ptr_vector.insertAtBottom(new Switch(i, this));
|
|
||||||
}
|
|
||||||
m_topology_ptr->createLinks(false); // false because this isn't a reconfiguration
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
void SimpleNetwork::reset()
|
void SimpleNetwork::reset()
|
||||||
{
|
{
|
||||||
for (int node = 0; node < m_nodes; node++) {
|
for (int node = 0; node < m_nodes; node++) {
|
||||||
|
|
|
@ -103,9 +103,7 @@ void Throttle::addLinks(const Vector<MessageBuffer*>& in_vec, const Vector<Messa
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// if (RubyConfig::getPrintTopology()) {
|
m_out_link_vec.insertAtBottom(out_vec);
|
||||||
m_out_link_vec.insertAtBottom(out_vec);
|
|
||||||
// }
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void Throttle::addVirtualNetwork(MessageBuffer* in_ptr, MessageBuffer* out_ptr)
|
void Throttle::addVirtualNetwork(MessageBuffer* in_ptr, MessageBuffer* out_ptr)
|
||||||
|
|
|
@ -40,7 +40,6 @@
|
||||||
#include "mem/ruby/common/NetDest.hh"
|
#include "mem/ruby/common/NetDest.hh"
|
||||||
#include "mem/ruby/network/Network.hh"
|
#include "mem/ruby/network/Network.hh"
|
||||||
#include "mem/protocol/TopologyType.hh"
|
#include "mem/protocol/TopologyType.hh"
|
||||||
//#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/gems_common/util.hh"
|
#include "mem/gems_common/util.hh"
|
||||||
#include "mem/protocol/MachineType.hh"
|
#include "mem/protocol/MachineType.hh"
|
||||||
#include "mem/protocol/Protocol.hh"
|
#include "mem/protocol/Protocol.hh"
|
||||||
|
@ -294,82 +293,6 @@ void Topology::createLinks(bool isReconfiguration)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
/*
|
|
||||||
void Topology::makeSwitchesPerChip(Vector< Vector < SwitchID > > &nodePairs, Vector<int> &latencies, Vector<int> &bw_multis, int numberOfChipSwitches)
|
|
||||||
{
|
|
||||||
|
|
||||||
Vector < SwitchID > nodes; // temporary buffer
|
|
||||||
nodes.setSize(2);
|
|
||||||
|
|
||||||
Vector<bool> endpointConnectionExist; // used to ensure all endpoints are connected to the network
|
|
||||||
endpointConnectionExist.setSize(m_nodes);
|
|
||||||
// initialize endpoint check vector
|
|
||||||
for (int k = 0; k < endpointConnectionExist.size(); k++) {
|
|
||||||
endpointConnectionExist[k] = false;
|
|
||||||
}
|
|
||||||
|
|
||||||
Vector<int> componentCount;
|
|
||||||
componentCount.setSize(MachineType_NUM);
|
|
||||||
for (MachineType mType = MachineType_FIRST; mType < MachineType_NUM; ++mType) {
|
|
||||||
componentCount[mType] = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
// components to/from network links
|
|
||||||
// TODO: drh5: bring back chips!!!
|
|
||||||
for (int chip = 0; chip < RubyConfig::getNumberOfChips(); chip++) {
|
|
||||||
for (MachineType mType = MachineType_FIRST; mType < MachineType_NUM; ++mType) {
|
|
||||||
for (int component = 0; component < MachineType_base_count(mType); component++) {
|
|
||||||
|
|
||||||
int latency = -1;
|
|
||||||
int bw_multiplier = -1; // internal link bw multiplier of the global bandwidth
|
|
||||||
if (mType != MachineType_Directory) {
|
|
||||||
latency = RubyConfig::getOnChipLinkLatency(); // internal link latency
|
|
||||||
bw_multiplier = 10; // internal link bw multiplier of the global bandwidth
|
|
||||||
} else {
|
|
||||||
latency = RubyConfig::getNetworkLinkLatency(); // local memory latency
|
|
||||||
bw_multiplier = 1; // local memory link bw multiplier of the global bandwidth
|
|
||||||
}
|
|
||||||
nodes[0] = MachineType_base_number(mType)+componentCount[mType];
|
|
||||||
nodes[1] = chip+m_nodes*2; // this is the chip's internal switch id #
|
|
||||||
|
|
||||||
// insert link
|
|
||||||
nodePairs.insertAtBottom(nodes);
|
|
||||||
latencies.insertAtBottom(latency);
|
|
||||||
bw_multis.insertAtBottom(bw_multiplier);
|
|
||||||
//bw_multis.insertAtBottom(componentCount[mType]+MachineType_base_number((MachineType)mType));
|
|
||||||
|
|
||||||
// opposite direction link
|
|
||||||
Vector < SwitchID > otherDirectionNodes;
|
|
||||||
otherDirectionNodes.setSize(2);
|
|
||||||
otherDirectionNodes[0] = nodes[1];
|
|
||||||
otherDirectionNodes[1] = nodes[0]+m_nodes;
|
|
||||||
nodePairs.insertAtBottom(otherDirectionNodes);
|
|
||||||
latencies.insertAtBottom(latency);
|
|
||||||
bw_multis.insertAtBottom(bw_multiplier);
|
|
||||||
|
|
||||||
assert(!endpointConnectionExist[nodes[0]]);
|
|
||||||
endpointConnectionExist[nodes[0]] = true;
|
|
||||||
componentCount[mType]++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// make sure all enpoints are connected in the soon to be created network
|
|
||||||
for (int k = 0; k < endpointConnectionExist.size(); k++) {
|
|
||||||
if (endpointConnectionExist[k] == false) {
|
|
||||||
cerr << "Error: Unconnected Endpoint: " << k << endl;
|
|
||||||
exit(1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// secondary check to ensure we saw the correct machine counts
|
|
||||||
for (MachineType mType = MachineType_FIRST; mType < MachineType_NUM; ++mType) {
|
|
||||||
assert(componentCount[mType] == MachineType_base_count((MachineType)mType));
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
SwitchID Topology::newSwitchID()
|
SwitchID Topology::newSwitchID()
|
||||||
{
|
{
|
||||||
|
|
|
@ -38,7 +38,6 @@
|
||||||
#define ACCESSTRACEFORADDRESS_H
|
#define ACCESSTRACEFORADDRESS_H
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/protocol/CacheRequestType.hh"
|
#include "mem/protocol/CacheRequestType.hh"
|
||||||
#include "mem/protocol/AccessModeType.hh"
|
#include "mem/protocol/AccessModeType.hh"
|
||||||
|
|
|
@ -98,31 +98,6 @@ Profiler::Profiler(const string & name)
|
||||||
m_stats_period = 1000000; // Default
|
m_stats_period = 1000000; // Default
|
||||||
m_periodic_output_file_ptr = &cerr;
|
m_periodic_output_file_ptr = &cerr;
|
||||||
|
|
||||||
//changed by SS
|
|
||||||
/*
|
|
||||||
// for MemoryControl:
|
|
||||||
m_memReq = 0;
|
|
||||||
m_memBankBusy = 0;
|
|
||||||
m_memBusBusy = 0;
|
|
||||||
m_memReadWriteBusy = 0;
|
|
||||||
m_memDataBusBusy = 0;
|
|
||||||
m_memTfawBusy = 0;
|
|
||||||
m_memRefresh = 0;
|
|
||||||
m_memRead = 0;
|
|
||||||
m_memWrite = 0;
|
|
||||||
m_memWaitCycles = 0;
|
|
||||||
m_memInputQ = 0;
|
|
||||||
m_memBankQ = 0;
|
|
||||||
m_memArbWait = 0;
|
|
||||||
m_memRandBusy = 0;
|
|
||||||
m_memNotOld = 0;
|
|
||||||
|
|
||||||
|
|
||||||
int totalBanks = RubyConfig::banksPerRank()
|
|
||||||
* RubyConfig::ranksPerDimm()
|
|
||||||
* RubyConfig::dimmsPerChannel();
|
|
||||||
m_memBankCount.setSize(totalBanks);
|
|
||||||
*/
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Profiler::~Profiler()
|
Profiler::~Profiler()
|
||||||
|
@ -870,7 +845,7 @@ void Profiler::addAddressTraceSample(const CacheMsg& msg, NodeID id)
|
||||||
// Note: The following line should be commented out if you want to
|
// Note: The following line should be commented out if you want to
|
||||||
// use the special profiling that is part of the GS320 protocol
|
// use the special profiling that is part of the GS320 protocol
|
||||||
|
|
||||||
// NOTE: Unless PROFILE_HOT_LINES or RubyConfig::getProfileAllInstructions() are enabled, nothing will be profiled by the AddressProfiler
|
// NOTE: Unless PROFILE_HOT_LINES is enabled, nothing will be profiled by the AddressProfiler
|
||||||
m_address_profiler_ptr->addTraceSample(msg.getLineAddress(), msg.getProgramCounter(), msg.getType(), msg.getAccessMode(), id, false);
|
m_address_profiler_ptr->addTraceSample(msg.getLineAddress(), msg.getProgramCounter(), msg.getType(), msg.getAccessMode(), id, false);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -58,7 +58,6 @@
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/protocol/GenericMachineType.hh"
|
#include "mem/protocol/GenericMachineType.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Histogram.hh"
|
#include "mem/ruby/common/Histogram.hh"
|
||||||
#include "mem/ruby/common/Consumer.hh"
|
#include "mem/ruby/common/Consumer.hh"
|
||||||
#include "mem/protocol/AccessModeType.hh"
|
#include "mem/protocol/AccessModeType.hh"
|
||||||
|
|
|
@ -38,7 +38,6 @@
|
||||||
#define StoreTrace_H
|
#define StoreTrace_H
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/common/Histogram.hh"
|
#include "mem/ruby/common/Histogram.hh"
|
||||||
|
|
||||||
|
|
|
@ -37,7 +37,6 @@
|
||||||
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
|
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
|
||||||
#include "mem/gems_common/PrioHeap.hh"
|
#include "mem/gems_common/PrioHeap.hh"
|
||||||
#include "mem/ruby/system/System.hh"
|
#include "mem/ruby/system/System.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
|
|
||||||
//added by SS
|
//added by SS
|
||||||
Tracer::Tracer(const string & name)
|
Tracer::Tracer(const string & name)
|
||||||
|
@ -130,8 +129,8 @@ int Tracer::playbackTrace(string filename)
|
||||||
ok = record.input(in);
|
ok = record.input(in);
|
||||||
|
|
||||||
// Clear the statistics after warmup
|
// Clear the statistics after warmup
|
||||||
/* if (counter == RubyConfig::getTraceWarmupLength()) {
|
/* if (counter == m_warmup_length) {
|
||||||
cout << "Clearing stats after warmup of length " << RubyConfig::getTraceWarmupLength() << endl;
|
cout << "Clearing stats after warmup of length " << m_warmup_length << endl;
|
||||||
g_system_ptr->clearStats();
|
g_system_ptr->clearStats();
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -35,7 +35,6 @@
|
||||||
#define COMPONENTMAPPINGFNS_H
|
#define COMPONENTMAPPINGFNS_H
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/system/NodeID.hh"
|
#include "mem/ruby/system/NodeID.hh"
|
||||||
#include "mem/ruby/system/MachineID.hh"
|
#include "mem/ruby/system/MachineID.hh"
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
|
@ -62,77 +61,6 @@
|
||||||
#define MACHINETYPE_L3CACHE_ENUM MachineType_NUM
|
#define MACHINETYPE_L3CACHE_ENUM MachineType_NUM
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
|
||||||
#ifdef MACHINETYPE_PersistentArbiter
|
|
||||||
#define MACHINETYPE_PERSISTENTARBITER_ENUM MachineType_PersistentArbiter
|
|
||||||
#else
|
|
||||||
#define MACHINETYPE_PERSISTENTARBITER_ENUM MachineType_NUM
|
|
||||||
#endif
|
|
||||||
*/
|
|
||||||
/*
|
|
||||||
inline MachineID map_Address_to_L2Cache(const Address & addr)
|
|
||||||
{
|
|
||||||
int L2bank = 0;
|
|
||||||
MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
|
|
||||||
L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
|
|
||||||
RubySystem::getBlockSizeBits() + RubyConfig::getNumberOfCachesPerLevel(2)-1);
|
|
||||||
mach.num = L2bank;
|
|
||||||
return mach;
|
|
||||||
}
|
|
||||||
|
|
||||||
// input parameter is the base ruby node of the L1 cache
|
|
||||||
// returns a value between 0 and total_L2_Caches_within_the_system
|
|
||||||
inline
|
|
||||||
MachineID map_L1CacheMachId_to_L2Cache(const Address& addr, MachineID L1CacheMachId)
|
|
||||||
{
|
|
||||||
return map_Address_to_L2Cache(addr);
|
|
||||||
|
|
||||||
int L2bank = 0;
|
|
||||||
MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
|
|
||||||
|
|
||||||
if (RubyConfig::L2CachePerChipBits() > 0) {
|
|
||||||
if (RubyConfig::getMAP_L2BANKS_TO_LOWEST_BITS()) {
|
|
||||||
L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
|
|
||||||
RubySystem::getBlockSizeBits()+RubyConfig::L2CachePerChipBits()-1);
|
|
||||||
} else {
|
|
||||||
L2bank = addr.bitSelect(RubySystem::getBlockSizeBits()+RubyConfig::getL2_CACHE_NUM_SETS_BITS(),
|
|
||||||
RubySystem::getBlockSizeBits()+RubyConfig::getL2_CACHE_NUM_SETS_BITS()+RubyConfig::L2CachePerChipBits()-1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
assert(L2bank < RubyConfig::numberOfL2CachePerChip());
|
|
||||||
assert(L2bank >= 0);
|
|
||||||
|
|
||||||
mach.num = RubyConfig::L1CacheNumToL2Base(L1CacheMachId.num)*RubyConfig::numberOfL2CachePerChip() // base #
|
|
||||||
+ L2bank; // bank #
|
|
||||||
assert(mach.num < RubyConfig::numberOfL2Cache());
|
|
||||||
return mach;
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// used to determine the correct L2 bank
|
|
||||||
// input parameter is the base ruby node of the L2 cache
|
|
||||||
// returns a value between 0 and total_L2_Caches_within_the_system
|
|
||||||
|
|
||||||
inline
|
|
||||||
MachineID map_L2ChipId_to_L2Cache(const Address& addr, NodeID L2ChipId)
|
|
||||||
{
|
|
||||||
return map_Address_to_L2Cache(addr);
|
|
||||||
|
|
||||||
assert(L2ChipId < RubyConfig::numberOfChips());
|
|
||||||
|
|
||||||
int L2bank = 0;
|
|
||||||
MachineID mach = {MACHINETYPE_L2CACHE_ENUM, 0};
|
|
||||||
L2bank = addr.bitSelect(RubySystem::getBlockSizeBits(),
|
|
||||||
RubySystem::getBlockSizeBits() + RubyConfig::numberOfCachesPerLevel(2)-1);
|
|
||||||
mach.num = L2bank;
|
|
||||||
return mach
|
|
||||||
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
// used to determine the home directory
|
// used to determine the home directory
|
||||||
// returns a value between 0 and total_directories_within_the_system
|
// returns a value between 0 and total_directories_within_the_system
|
||||||
inline
|
inline
|
||||||
|
@ -157,29 +85,8 @@ MachineID map_Address_to_DMA(const Address & addr)
|
||||||
return dma;
|
return dma;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
inline
|
|
||||||
NetDest getOtherLocalL1IDs(MachineID L1)
|
|
||||||
{
|
|
||||||
int start = (L1.num / RubyConfig::numberOfProcsPerChip()) * RubyConfig::numberOfProcsPerChip();
|
|
||||||
NetDest ret;
|
|
||||||
|
|
||||||
assert(MACHINETYPE_L1CACHE_ENUM != MachineType_NUM);
|
|
||||||
|
|
||||||
for (int i = start; i < (start + RubyConfig::numberOfProcsPerChip()); i++) {
|
|
||||||
if (i != L1.num) {
|
|
||||||
MachineID mach = { MACHINETYPE_L1CACHE_ENUM, i };
|
|
||||||
ret.add( mach );
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
|
|
||||||
extern inline NodeID machineIDToNodeID(MachineID machID)
|
extern inline NodeID machineIDToNodeID(MachineID machID)
|
||||||
{
|
{
|
||||||
// return machID.num%RubyConfig::numberOfChips();
|
|
||||||
return machID.num;
|
return machID.num;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -193,22 +100,7 @@ extern inline NodeID L1CacheMachIDToProcessorNum(MachineID machID)
|
||||||
assert(machID.type == MachineType_L1Cache);
|
assert(machID.type == MachineType_L1Cache);
|
||||||
return machID.num;
|
return machID.num;
|
||||||
}
|
}
|
||||||
/*
|
|
||||||
extern inline NodeID L2CacheMachIDToChipID(MachineID machID)
|
|
||||||
{
|
|
||||||
assert(machID.type == MACHINETYPE_L2CACHE_ENUM);
|
|
||||||
int L2bank = machID.num;
|
|
||||||
int banks_seen = 0;
|
|
||||||
for (int i=0;i<RubyConfig::getNumberOfChips();i++) {
|
|
||||||
for (int j=0;j<RubyConfig::getNumberOfCachesPerLevelPerChip(2,i);j++) {
|
|
||||||
if (banks_seen == L2bank)
|
|
||||||
return i;
|
|
||||||
banks_seen++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
assert(0);
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
extern inline MachineID getL1MachineID(NodeID L1RubyNode)
|
extern inline MachineID getL1MachineID(NodeID L1RubyNode)
|
||||||
{
|
{
|
||||||
MachineID mach = {MACHINETYPE_L1CACHE_ENUM, L1RubyNode};
|
MachineID mach = {MACHINETYPE_L1CACHE_ENUM, L1RubyNode};
|
||||||
|
|
|
@ -43,7 +43,6 @@
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/system/NodeID.hh"
|
#include "mem/ruby/system/NodeID.hh"
|
||||||
#include "mem/ruby/system/MachineID.hh"
|
#include "mem/ruby/system/MachineID.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/protocol/CacheMsg.hh"
|
#include "mem/protocol/CacheMsg.hh"
|
||||||
#include "mem/protocol/GenericRequestType.hh"
|
#include "mem/protocol/GenericRequestType.hh"
|
||||||
#include "mem/protocol/CacheRequestType.hh"
|
#include "mem/protocol/CacheRequestType.hh"
|
||||||
|
@ -112,19 +111,6 @@ extern inline int MessageSizeTypeToInt(MessageSizeType size_type)
|
||||||
return MessageSizeType_to_int(size_type);
|
return MessageSizeType_to_int(size_type);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
extern inline int numberOfNodes()
|
|
||||||
{
|
|
||||||
return RubyConfig::numberOfChips();
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
/*
|
|
||||||
extern inline int numberOfL1CachePerChip()
|
|
||||||
{
|
|
||||||
return RubyConfig::getNumberOfCachesPerLevelPerChip(1,0);
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
|
|
||||||
extern inline bool long_enough_ago(Time event)
|
extern inline bool long_enough_ago(Time event)
|
||||||
{
|
{
|
||||||
return ((get_time() - event) > 200);
|
return ((get_time() - event) > 200);
|
||||||
|
@ -171,40 +157,6 @@ extern inline Time time_to_int(Time time)
|
||||||
return time;
|
return time;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
extern inline bool getFilteringEnabled()
|
|
||||||
{
|
|
||||||
return RubyConfig::getFilteringEnabled();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern inline int getRetryThreshold()
|
|
||||||
{
|
|
||||||
return RubyConfig::getRetryThreshold();
|
|
||||||
}
|
|
||||||
|
|
||||||
extern inline int getFixedTimeoutLatency()
|
|
||||||
{
|
|
||||||
return RubyConfig::getFixedTimeoutLatency();
|
|
||||||
}
|
|
||||||
|
|
||||||
extern inline int N_tokens()
|
|
||||||
{
|
|
||||||
// return N+1 to handle clean writeback
|
|
||||||
return RubyConfig::getProcsPerChip() + 1;
|
|
||||||
// return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
extern inline bool distributedPersistentEnabled()
|
|
||||||
{
|
|
||||||
return RubyConfig::getDistributedPersistentEnabled();
|
|
||||||
}
|
|
||||||
|
|
||||||
extern inline bool getDynamicTimeoutEnabled()
|
|
||||||
{
|
|
||||||
return RubyConfig::getDynamicTimeoutEnabled();
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
// Appends an offset to an address
|
// Appends an offset to an address
|
||||||
extern inline Address setOffset(Address addr, int offset)
|
extern inline Address setOffset(Address addr, int offset)
|
||||||
{
|
{
|
||||||
|
|
|
@ -11,7 +11,6 @@
|
||||||
#define ABSTRACT_MEM_OR_CACHE_H
|
#define ABSTRACT_MEM_OR_CACHE_H
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
|
|
||||||
class AbstractMemOrCache {
|
class AbstractMemOrCache {
|
||||||
|
|
|
@ -160,45 +160,7 @@ private:
|
||||||
|
|
||||||
static Vector< CacheMemory* > m_all_caches;
|
static Vector< CacheMemory* > m_all_caches;
|
||||||
};
|
};
|
||||||
/*
|
|
||||||
inline
|
|
||||||
CacheMemory* CacheMemory::getCache(int cache_id)
|
|
||||||
{
|
|
||||||
assert(cache_id < RubyConfig::getNumberOfCaches());
|
|
||||||
if (m_all_caches[cache_id] == NULL) {
|
|
||||||
cerr << "ERROR: Tried to obtain CacheMemory that hasn't been created yet." << endl;
|
|
||||||
assert(0);
|
|
||||||
}
|
|
||||||
return m_all_caches[cache_id];
|
|
||||||
}
|
|
||||||
|
|
||||||
inline
|
|
||||||
CacheMemory* CacheMemory::createCache(int level, int num, char split_type_c, AbstractCacheEntry* (*entry_factory)())
|
|
||||||
{
|
|
||||||
string split_type;
|
|
||||||
switch(split_type_c) {
|
|
||||||
case 'i':
|
|
||||||
split_type = "instruction"; break;
|
|
||||||
case 'd':
|
|
||||||
split_type = "data"; break;
|
|
||||||
default:
|
|
||||||
split_type = "unified"; break;
|
|
||||||
}
|
|
||||||
int cache_id = RubyConfig::getCacheIDFromParams(level, num, split_type);
|
|
||||||
assert(cache_id < RubyConfig::getNumberOfCaches());
|
|
||||||
if (m_all_caches.size() == 0) {
|
|
||||||
m_all_caches.setSize(RubyConfig::getNumberOfCaches());
|
|
||||||
for (int i=0; i<m_all_caches.size(); i++)
|
|
||||||
m_all_caches[i] = NULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
string type = RubyConfig::getCacheType(cache_id);
|
|
||||||
if ( type == "SetAssociativeCache" ) {
|
|
||||||
m_all_caches[cache_id] = new CacheMemory(cache_id, entry_factory);
|
|
||||||
}
|
|
||||||
return m_all_caches[cache_id];
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
// Output operator declaration
|
// Output operator declaration
|
||||||
//ostream& operator<<(ostream& out, const CacheMemory<ENTRY>& obj);
|
//ostream& operator<<(ostream& out, const CacheMemory<ENTRY>& obj);
|
||||||
|
|
||||||
|
@ -266,43 +228,7 @@ void CacheMemory::init(const vector<string> & argv)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
/*
|
|
||||||
inline
|
|
||||||
CacheMemory::CacheMemory(int cache_id, AbstractCacheEntry* (*entry_factory)())
|
|
||||||
{
|
|
||||||
string split_type;
|
|
||||||
|
|
||||||
m_cache_id = cache_id;
|
|
||||||
m_entry_factory = entry_factory;
|
|
||||||
|
|
||||||
m_cache_num_set_bits = RubyConfig::getNumberOfCacheSetBits(cache_id);
|
|
||||||
m_cache_num_sets = RubyConfig::getNumberOfCacheSets(cache_id);
|
|
||||||
m_cache_assoc = RubyConfig::getCacheAssoc(cache_id);
|
|
||||||
split_type = RubyConfig::getCacheSplitType(cache_id);
|
|
||||||
m_is_instruction_only_cache = m_is_data_only_cache = false;
|
|
||||||
if (split_type == "instruction")
|
|
||||||
m_is_instruction_only_cache = true;
|
|
||||||
else if (split_type == "data")
|
|
||||||
m_is_data_only_cache = true;
|
|
||||||
else
|
|
||||||
assert(split_type == "unified");
|
|
||||||
|
|
||||||
if(RubyConfig::getCacheReplacementPolicy(cache_id) == "PSEUDO_LRU")
|
|
||||||
m_replacementPolicy_ptr = new PseudoLRUPolicy(m_cache_num_sets, m_cache_assoc);
|
|
||||||
else if(RubyConfig::getCacheReplacementPolicy(cache_id) == "LRU")
|
|
||||||
m_replacementPolicy_ptr = new LRUPolicy(m_cache_num_sets, m_cache_assoc);
|
|
||||||
else
|
|
||||||
assert(false);
|
|
||||||
|
|
||||||
m_cache.setSize(m_cache_num_sets);
|
|
||||||
for (int i = 0; i < m_cache_num_sets; i++) {
|
|
||||||
m_cache[i].setSize(m_cache_assoc);
|
|
||||||
for (int j = 0; j < m_cache_assoc; j++) {
|
|
||||||
m_cache[i][j] = m_entry_factory();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
inline
|
inline
|
||||||
CacheMemory::~CacheMemory()
|
CacheMemory::~CacheMemory()
|
||||||
{
|
{
|
||||||
|
|
|
@ -39,7 +39,6 @@
|
||||||
#include "mem/ruby/system/System.hh"
|
#include "mem/ruby/system/System.hh"
|
||||||
#include "mem/ruby/system/DirectoryMemory.hh"
|
#include "mem/ruby/system/DirectoryMemory.hh"
|
||||||
#include "mem/ruby/slicc_interface/RubySlicc_Util.hh"
|
#include "mem/ruby/slicc_interface/RubySlicc_Util.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/slicc_interface/AbstractController.hh"
|
#include "mem/ruby/slicc_interface/AbstractController.hh"
|
||||||
#include "mem/gems_common/util.hh"
|
#include "mem/gems_common/util.hh"
|
||||||
|
|
||||||
|
|
|
@ -42,7 +42,6 @@
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/gems_common/Map.hh"
|
#include "mem/gems_common/Map.hh"
|
||||||
#include "mem/protocol/AccessPermission.hh"
|
#include "mem/protocol/AccessPermission.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Address.hh"
|
#include "mem/ruby/common/Address.hh"
|
||||||
#include "mem/ruby/slicc_interface/AbstractChip.hh"
|
#include "mem/ruby/slicc_interface/AbstractChip.hh"
|
||||||
|
|
||||||
|
|
|
@ -490,183 +490,3 @@ void Sequencer::checkCoherence(const Address& addr) {
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
bool Sequencer::getRubyMemoryValue(const Address& addr, char* value,
|
|
||||||
unsigned int size_in_bytes )
|
|
||||||
{
|
|
||||||
bool found = false;
|
|
||||||
const Address lineAddr = line_address(addr);
|
|
||||||
DataBlock data;
|
|
||||||
PhysAddress paddr(addr);
|
|
||||||
DataBlock* dataPtr = &data;
|
|
||||||
|
|
||||||
MachineID l2_mach = map_L2ChipId_to_L2Cache(addr, m_chip_ptr->getID() );
|
|
||||||
int l2_ver = l2_mach.num%RubyConfig::numberOfL2CachePerChip();
|
|
||||||
|
|
||||||
if (Protocol::m_TwoLevelCache) {
|
|
||||||
if(Protocol::m_CMP){
|
|
||||||
assert(n->m_L2Cache_L2cacheMemory_vec[l2_ver] != NULL);
|
|
||||||
}
|
|
||||||
else{
|
|
||||||
assert(n->m_L1Cache_cacheMemory_vec[m_version] != NULL);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (n->m_L1Cache_L1IcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_IFETCH, dataPtr)){
|
|
||||||
n->m_L1Cache_L1IcacheMemory_vec[m_version]->getMemoryValue(addr, value, size_in_bytes);
|
|
||||||
found = true;
|
|
||||||
} else if (n->m_L1Cache_L1DcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){
|
|
||||||
n->m_L1Cache_L1DcacheMemory_vec[m_version]->getMemoryValue(addr, value, size_in_bytes);
|
|
||||||
found = true;
|
|
||||||
} else if (Protocol::m_CMP && n->m_L2Cache_L2cacheMemory_vec[l2_ver]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){
|
|
||||||
n->m_L2Cache_L2cacheMemory_vec[l2_ver]->getMemoryValue(addr, value, size_in_bytes);
|
|
||||||
found = true;
|
|
||||||
// } else if (n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr)){
|
|
||||||
// ASSERT(n->TBE_TABLE_MEMBER_VARIABLE->isPresent(lineAddr));
|
|
||||||
// L1Cache_TBE tbeEntry = n->TBE_TABLE_MEMBER_VARIABLE->lookup(lineAddr);
|
|
||||||
|
|
||||||
// int offset = addr.getOffset();
|
|
||||||
// for(int i=0; i<size_in_bytes; ++i){
|
|
||||||
// value[i] = tbeEntry.getDataBlk().getByte(offset + i);
|
|
||||||
// }
|
|
||||||
|
|
||||||
// found = true;
|
|
||||||
} else {
|
|
||||||
// Address not found
|
|
||||||
//cout << " " << m_chip_ptr->getID() << " NOT IN CACHE, Value at Directory is: " << (int) value[0] << endl;
|
|
||||||
n = dynamic_cast<Chip*>(g_system_ptr->getChip(map_Address_to_DirectoryNode(addr)/RubyConfig::numberOfDirectoryPerChip()));
|
|
||||||
int dir_version = map_Address_to_DirectoryNode(addr)%RubyConfig::numberOfDirectoryPerChip();
|
|
||||||
for(unsigned int i=0; i<size_in_bytes; ++i){
|
|
||||||
int offset = addr.getOffset();
|
|
||||||
value[i] = n->m_Directory_directory_vec[dir_version]->lookup(lineAddr).m_DataBlk.getByte(offset + i);
|
|
||||||
}
|
|
||||||
// Address not found
|
|
||||||
//WARN_MSG("Couldn't find address");
|
|
||||||
//WARN_EXPR(addr);
|
|
||||||
found = false;
|
|
||||||
}
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool Sequencer::setRubyMemoryValue(const Address& addr, char *value,
|
|
||||||
unsigned int size_in_bytes) {
|
|
||||||
char test_buffer[64];
|
|
||||||
|
|
||||||
// idea here is that coherent cache should find the
|
|
||||||
// latest data, the update it
|
|
||||||
bool found = false;
|
|
||||||
const Address lineAddr = line_address(addr);
|
|
||||||
PhysAddress paddr(addr);
|
|
||||||
DataBlock data;
|
|
||||||
DataBlock* dataPtr = &data;
|
|
||||||
Chip* n = dynamic_cast<Chip*>(m_chip_ptr);
|
|
||||||
|
|
||||||
MachineID l2_mach = map_L2ChipId_to_L2Cache(addr, m_chip_ptr->getID() );
|
|
||||||
int l2_ver = l2_mach.num%RubyConfig::numberOfL2CachePerChip();
|
|
||||||
|
|
||||||
assert(n->m_L1Cache_L1IcacheMemory_vec[m_version] != NULL);
|
|
||||||
assert(n->m_L1Cache_L1DcacheMemory_vec[m_version] != NULL);
|
|
||||||
if (Protocol::m_TwoLevelCache) {
|
|
||||||
if(Protocol::m_CMP){
|
|
||||||
assert(n->m_L2Cache_L2cacheMemory_vec[l2_ver] != NULL);
|
|
||||||
}
|
|
||||||
else{
|
|
||||||
assert(n->m_L1Cache_cacheMemory_vec[m_version] != NULL);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (n->m_L1Cache_L1IcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_IFETCH, dataPtr)){
|
|
||||||
n->m_L1Cache_L1IcacheMemory_vec[m_version]->setMemoryValue(addr, value, size_in_bytes);
|
|
||||||
found = true;
|
|
||||||
} else if (n->m_L1Cache_L1DcacheMemory_vec[m_version]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){
|
|
||||||
n->m_L1Cache_L1DcacheMemory_vec[m_version]->setMemoryValue(addr, value, size_in_bytes);
|
|
||||||
found = true;
|
|
||||||
} else if (Protocol::m_CMP && n->m_L2Cache_L2cacheMemory_vec[l2_ver]->tryCacheAccess(lineAddr, CacheRequestType_LD, dataPtr)){
|
|
||||||
n->m_L2Cache_L2cacheMemory_vec[l2_ver]->setMemoryValue(addr, value, size_in_bytes);
|
|
||||||
found = true;
|
|
||||||
} else {
|
|
||||||
// Address not found
|
|
||||||
n = dynamic_cast<Chip*>(g_system_ptr->getChip(map_Address_to_DirectoryNode(addr)/RubyConfig::numberOfDirectoryPerChip()));
|
|
||||||
int dir_version = map_Address_to_DirectoryNode(addr)%RubyConfig::numberOfDirectoryPerChip();
|
|
||||||
for(unsigned int i=0; i<size_in_bytes; ++i){
|
|
||||||
int offset = addr.getOffset();
|
|
||||||
n->m_Directory_directory_vec[dir_version]->lookup(lineAddr).m_DataBlk.setByte(offset + i, value[i]);
|
|
||||||
}
|
|
||||||
found = false;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (found){
|
|
||||||
found = getRubyMemoryValue(addr, test_buffer, size_in_bytes);
|
|
||||||
assert(found);
|
|
||||||
if(value[0] != test_buffer[0]){
|
|
||||||
WARN_EXPR((int) value[0]);
|
|
||||||
WARN_EXPR((int) test_buffer[0]);
|
|
||||||
ERROR_MSG("setRubyMemoryValue failed to set value.");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
/*
|
|
||||||
|
|
||||||
void
|
|
||||||
Sequencer::rubyMemAccess(const uint64 paddr, char* data, const int len, const AccessType type)
|
|
||||||
{
|
|
||||||
if ( type == AccessType_Read || type == AccessType_Write ) {
|
|
||||||
// need to break up the packet data
|
|
||||||
uint64 guest_ptr = paddr;
|
|
||||||
Vector<DataBlock*> datablocks;
|
|
||||||
while (paddr + len != guest_ptr) {
|
|
||||||
Address addr(guest_ptr);
|
|
||||||
Address line_addr = line_address(addr);
|
|
||||||
|
|
||||||
int bytes_copied;
|
|
||||||
if (addr.getOffset() == 0) {
|
|
||||||
bytes_copied = (guest_ptr + RubyConfig::dataBlockBytes() > paddr + len)?
|
|
||||||
(paddr + len - guest_ptr):
|
|
||||||
RubyConfig::dataBlockBytes();
|
|
||||||
} else {
|
|
||||||
bytes_copied = RubyConfig::dataBlockBytes() - addr.getOffset();
|
|
||||||
if (guest_ptr + bytes_copied > paddr + len)
|
|
||||||
bytes_copied = paddr + len - guest_ptr;
|
|
||||||
}
|
|
||||||
|
|
||||||
// first we need to find all data blocks that have to be updated for a write
|
|
||||||
// and the highest block for a read
|
|
||||||
for(int i=0;i<RubyConfig::numberOfProcessors();i++) {
|
|
||||||
if (Protocol::m_TwoLevelCache){
|
|
||||||
if(m_chip_ptr->m_L1Cache_L1IcacheMemory_vec[i]->isTagPresent(line_address(addr)))
|
|
||||||
datablocks.insertAtBottom(&m_chip_ptr->m_L1Cache_L1IcacheMemory_vec[i]->lookup(line_addr).getDataBlk());
|
|
||||||
if(m_chip_ptr->m_L1Cache_L1DcacheMemory_vec[i]->isTagPresent(line_address(addr)))
|
|
||||||
datablocks.insertAtBottom(&m_chip_ptr->m_L1Cache_L1DcacheMemory_vec[i]->lookup(line_addr).getDataBlk());
|
|
||||||
} else {
|
|
||||||
if(m_chip_ptr->m_L1Cache_cacheMemory_vec[i]->isTagPresent(line_address(addr)))
|
|
||||||
datablocks.insertAtBottom(&m_chip_ptr->m_L1Cache_cacheMemory_vec[i]->lookup(line_addr).getDataBlk());
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (Protocol::m_TwoLevelCache){
|
|
||||||
int l2_bank = map_L2ChipId_to_L2Cache(addr, 0).num; // TODO: ONLY WORKS WITH CMP!!!
|
|
||||||
if (m_chip_ptr->m_L2Cache_L2cacheMemory_vec[l2_bank]->isTagPresent(line_address(Address(paddr)))) {
|
|
||||||
datablocks.insertAtBottom(&m_chip_ptr->m_L2Cache_L2cacheMemory_vec[l2_bank]->lookup(addr).getDataBlk());
|
|
||||||
}
|
|
||||||
}
|
|
||||||
assert(dynamic_cast<Chip*>(m_chip_ptr)->m_Directory_directory_vec.size() > map_Address_to_DirectoryNode(addr));
|
|
||||||
DirectoryMemory* dir = dynamic_cast<Chip*>(m_chip_ptr)->m_Directory_directory_vec[map_Address_to_DirectoryNode(addr)];
|
|
||||||
Directory_Entry& entry = dir->lookup(line_addr);
|
|
||||||
datablocks.insertAtBottom(&entry.getDataBlk());
|
|
||||||
|
|
||||||
if (pkt->isRead()){
|
|
||||||
datablocks[0]->copyData(pkt_data, addr.getOffset(), bytes_copied);
|
|
||||||
} else {// pkt->isWrite() {
|
|
||||||
for (int i=0;i<datablocks.size();i++)
|
|
||||||
datablocks[i]->setData(pkt_data, addr.getOffset(), bytes_copied);
|
|
||||||
}
|
|
||||||
|
|
||||||
guest_ptr += bytes_copied;
|
|
||||||
pkt_data += bytes_copied;
|
|
||||||
datablocks.clear();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
|
@ -38,7 +38,6 @@
|
||||||
#define SEQUENCER_H
|
#define SEQUENCER_H
|
||||||
|
|
||||||
#include "mem/ruby/common/Global.hh"
|
#include "mem/ruby/common/Global.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/common/Consumer.hh"
|
#include "mem/ruby/common/Consumer.hh"
|
||||||
#include "mem/protocol/CacheRequestType.hh"
|
#include "mem/protocol/CacheRequestType.hh"
|
||||||
#include "mem/protocol/AccessModeType.hh"
|
#include "mem/protocol/AccessModeType.hh"
|
||||||
|
|
|
@ -278,16 +278,7 @@ RubySystem::RubySystem(const vector <RubyObjConf> & sys_conf)
|
||||||
|
|
||||||
RubySystem::~RubySystem()
|
RubySystem::~RubySystem()
|
||||||
{
|
{
|
||||||
/*
|
|
||||||
for (int i=0; i < MachineType_base_level(MachineType_NUM); i++) {
|
|
||||||
for (int j=0; j < RubyConfig::getNumberOfControllersPerType(i); j++ ) {
|
|
||||||
delete m_controllers[i][j];
|
|
||||||
}
|
|
||||||
}
|
|
||||||
delete m_network_ptr;
|
|
||||||
delete m_profiler_ptr;
|
|
||||||
delete m_tracer_ptr;
|
|
||||||
*/
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void RubySystem::printSystemConfig(ostream & out)
|
void RubySystem::printSystemConfig(ostream & out)
|
||||||
|
@ -307,8 +298,6 @@ void RubySystem::printSystemConfig(ostream & out)
|
||||||
void RubySystem::printConfig(ostream& out)
|
void RubySystem::printConfig(ostream& out)
|
||||||
{
|
{
|
||||||
out << "\n================ Begin RubySystem Configuration Print ================\n\n";
|
out << "\n================ Begin RubySystem Configuration Print ================\n\n";
|
||||||
// RubyConfig::printConfiguration(out);
|
|
||||||
// out << endl;
|
|
||||||
printSystemConfig(out);
|
printSystemConfig(out);
|
||||||
for (map<string, AbstractController*>::const_iterator it = m_controllers.begin();
|
for (map<string, AbstractController*>::const_iterator it = m_controllers.begin();
|
||||||
it != m_controllers.end(); it++) {
|
it != m_controllers.end(); it++) {
|
||||||
|
@ -367,19 +356,7 @@ void RubySystem::clearStats() const
|
||||||
|
|
||||||
void RubySystem::recordCacheContents(CacheRecorder& tr) const
|
void RubySystem::recordCacheContents(CacheRecorder& tr) const
|
||||||
{
|
{
|
||||||
/*
|
|
||||||
for (int i = 0; i < m_chip_vector.size(); i++) {
|
|
||||||
for (int m_version = 0; m_version < RubyConfig::numberOfProcsPerChip(); m_version++) {
|
|
||||||
if (Protocol::m_TwoLevelCache) {
|
|
||||||
m_chip_vector[i]->m_L1Cache_L1IcacheMemory_vec[m_version]->setAsInstructionCache(true);
|
|
||||||
m_chip_vector[i]->m_L1Cache_L1DcacheMemory_vec[m_version]->setAsInstructionCache(false);
|
|
||||||
} else {
|
|
||||||
m_chip_vector[i]->m_L1Cache_cacheMemory_vec[m_version]->setAsInstructionCache(false);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
m_chip_vector[i]->recordCacheContents(tr);
|
|
||||||
}
|
|
||||||
*/
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CHECK_COHERENCE
|
#ifdef CHECK_COHERENCE
|
||||||
|
|
|
@ -61,6 +61,20 @@ class DirectoryMemory;
|
||||||
class Topology;
|
class Topology;
|
||||||
class MemoryControl;
|
class MemoryControl;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* This defines the number of longs (32-bits on 32 bit machines,
|
||||||
|
* 64-bit on 64-bit AMD machines) to use to hold the set...
|
||||||
|
* the default is 4, allowing 128 or 256 different members
|
||||||
|
* of the set.
|
||||||
|
*
|
||||||
|
* This should never need to be changed for correctness reasons,
|
||||||
|
* though increasing it will increase performance for larger
|
||||||
|
* set sizes at the cost of a (much) larger memory footprint
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
const int NUMBER_WORDS_PER_SET = 4;
|
||||||
|
|
||||||
|
|
||||||
struct RubyObjConf {
|
struct RubyObjConf {
|
||||||
string type;
|
string type;
|
||||||
string name;
|
string name;
|
||||||
|
|
|
@ -21,7 +21,6 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "mem/ruby/tester/RaceyPseudoThread.hh"
|
#include "mem/ruby/tester/RaceyPseudoThread.hh"
|
||||||
#include "mem/ruby/config/RubyConfig.hh"
|
|
||||||
#include "mem/ruby/tester/RaceyDriver.hh"
|
#include "mem/ruby/tester/RaceyDriver.hh"
|
||||||
#include "gzstream.hh"
|
#include "gzstream.hh"
|
||||||
|
|
||||||
|
|
|
@ -77,7 +77,7 @@ void EnqueueStatementAST::generate(string& code, Type* return_type_ptr) const
|
||||||
code += ".enqueue(out_msg";
|
code += ".enqueue(out_msg";
|
||||||
|
|
||||||
if (getPairs().exist("latency")) {
|
if (getPairs().exist("latency")) {
|
||||||
code += ", RubyConfig::get" + getPairs().lookup("latency") + "()";
|
code += ", m_LATENCY_" + getPairs().lookup("latency");
|
||||||
}
|
}
|
||||||
|
|
||||||
code += ");\n";
|
code += ");\n";
|
||||||
|
|
|
@ -719,11 +719,12 @@ void StateMachine::printControllerC(ostream& out, string component)
|
||||||
out << "{" << endl;
|
out << "{" << endl;
|
||||||
out << " DEBUG_MSG(GENERATED_COMP, HighPrio,\"executing\");" << endl;
|
out << " DEBUG_MSG(GENERATED_COMP, HighPrio,\"executing\");" << endl;
|
||||||
//added by SS
|
//added by SS
|
||||||
//instead of rubyconfig:: --> it should point to m_latency...
|
//it should point to m_latency...
|
||||||
//so I should change the string output of this lookup
|
//so I should change the string output of this lookup
|
||||||
|
|
||||||
string c_code_string = action.lookupPair("c_code");
|
|
||||||
|
|
||||||
|
string c_code_string = action.lookupPair("c_code");
|
||||||
|
/*
|
||||||
size_t found = c_code_string.find("RubyConfig::get");
|
size_t found = c_code_string.find("RubyConfig::get");
|
||||||
|
|
||||||
if (found!=string::npos){ //found --> replace it with local access
|
if (found!=string::npos){ //found --> replace it with local access
|
||||||
|
@ -741,7 +742,7 @@ void StateMachine::printControllerC(ostream& out, string component)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
*/
|
||||||
// add here:
|
// add here:
|
||||||
if (strncmp(component.c_str(), "L1Cache", 7) == 0) {
|
if (strncmp(component.c_str(), "L1Cache", 7) == 0) {
|
||||||
if (c_code_string.find("writeCallback") != string::npos) {
|
if (c_code_string.find("writeCallback") != string::npos) {
|
||||||
|
|
|
@ -583,7 +583,6 @@ void Type::printEnumC(string path) const
|
||||||
out << endl;
|
out << endl;
|
||||||
out << "#include \"mem/protocol/" << type_name << ".hh\"" << endl;
|
out << "#include \"mem/protocol/" << type_name << ".hh\"" << endl;
|
||||||
if (m_isMachineType) {
|
if (m_isMachineType) {
|
||||||
out << "#include \"mem/ruby/config/RubyConfig.hh\"" << endl;
|
|
||||||
out << "#include \"mem/protocol/ControllerFactory.hh\"" << endl;
|
out << "#include \"mem/protocol/ControllerFactory.hh\"" << endl;
|
||||||
for( int i = 0; i<size; i++ ) {
|
for( int i = 0; i<size; i++ ) {
|
||||||
out << "#include \"mem/protocol/" << m_enum_vec[i] << "_Controller.hh\"" << endl;
|
out << "#include \"mem/protocol/" << m_enum_vec[i] << "_Controller.hh\"" << endl;
|
||||||
|
@ -675,7 +674,7 @@ void Type::printEnumC(string path) const
|
||||||
out << " }" << endl;
|
out << " }" << endl;
|
||||||
out << "}" << endl;
|
out << "}" << endl;
|
||||||
|
|
||||||
out << "/** \\brief returns the machine type for each base vector index used by NetDest and RubyConfig" << endl;
|
out << "/** \\brief returns the machine type for each base vector index used by NetDest" << endl;
|
||||||
out << " * " << endl;
|
out << " * " << endl;
|
||||||
out << " * \\return the MachineTYpe" << endl;
|
out << " * \\return the MachineTYpe" << endl;
|
||||||
out << " */" << endl;
|
out << " */" << endl;
|
||||||
|
@ -762,29 +761,6 @@ void Type::printEnumC(string path) const
|
||||||
|
|
||||||
out << endl;
|
out << endl;
|
||||||
|
|
||||||
// out << "/** \\brief returns the total number of components for each machine" << endl;
|
|
||||||
// out << " * \\return the total number of components for each machine" << endl;
|
|
||||||
// out << " */" << endl;
|
|
||||||
// out << "int " << type_name << "_chip_count(const " << type_name << "& obj, int chip_id)" << endl;
|
|
||||||
// out << "{" << endl;
|
|
||||||
// out << " switch(obj) {" << endl;
|
|
||||||
|
|
||||||
// // For each field
|
|
||||||
// for( int i = 0; i<size; i++ ) {
|
|
||||||
// out << " case " << type_name << "_" << m_enum_vec[i] << ":" << endl;
|
|
||||||
// out << " return RubyConfig::getNumberOfControllersPerTypePerChip(MachineType_base_level(MachineType_" << m_enum_vec[i] << "), chip_id);" << endl;
|
|
||||||
// }
|
|
||||||
|
|
||||||
// // total num
|
|
||||||
// out << " case " << type_name << "_NUM:" << endl;
|
|
||||||
// // Trailer
|
|
||||||
// out << " default:" << endl;
|
|
||||||
// out << " ERROR_MSG(\"Invalid range for type " << type_name << "\");" << endl;
|
|
||||||
// out << " return -1;" << endl;
|
|
||||||
// out << " }" << endl;
|
|
||||||
// out << "}" << endl;
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// Write the file
|
// Write the file
|
||||||
|
|
Loading…
Reference in a new issue