add a flag that supercedes all other InstExec flags to print a trace in the Intel sim compatible format.

--HG--
extra : convert_revision : 19569e5645f2d68fb68a0352753c08c2a24bfdc4
This commit is contained in:
Lisa Hsu 2005-10-09 18:20:54 -04:00
parent a23ff5ac96
commit 7b04cd9561
2 changed files with 73 additions and 58 deletions

View file

@ -51,81 +51,91 @@ using namespace std;
void void
Trace::InstRecord::dump(ostream &outs) Trace::InstRecord::dump(ostream &outs)
{ {
if (flags[INTEL_FORMAT]) {
ccprintf(outs, "%7d ) ", cycle);
outs << "0x" << hex << PC << ":\t";
if (staticInst->isLoad()) {
outs << "<RD 0x" << hex << addr;
outs << ">";
} else if (staticInst->isStore()) {
outs << "<WR 0x" << hex << addr;
outs << ">";
}
} else {
if (flags[PRINT_CYCLE])
ccprintf(outs, "%7d: ", cycle);
if (flags[PRINT_CYCLE]) outs << cpu->name() << " ";
ccprintf(outs, "%7d: ", cycle);
outs << cpu->name() << " "; if (flags[TRACE_MISSPEC])
outs << (misspeculating ? "-" : "+") << " ";
if (flags[TRACE_MISSPEC]) if (flags[PRINT_THREAD_NUM])
outs << (misspeculating ? "-" : "+") << " "; outs << "T" << thread << " : ";
if (flags[PRINT_THREAD_NUM])
outs << "T" << thread << " : ";
std::string sym_str; std::string sym_str;
Addr sym_addr; Addr sym_addr;
if (debugSymbolTable if (debugSymbolTable
&& debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) { && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
if (PC != sym_addr) if (PC != sym_addr)
sym_str += csprintf("+%d", PC - sym_addr); sym_str += csprintf("+%d", PC - sym_addr);
outs << "@" << sym_str << " : "; outs << "@" << sym_str << " : ";
} }
else { else {
outs << "0x" << hex << PC << " : "; outs << "0x" << hex << PC << " : ";
} }
// //
// Print decoded instruction // Print decoded instruction
// //
#if defined(__GNUC__) && (__GNUC__ < 3) #if defined(__GNUC__) && (__GNUC__ < 3)
// There's a bug in gcc 2.x library that prevents setw() // There's a bug in gcc 2.x library that prevents setw()
// from working properly on strings // from working properly on strings
string mc(staticInst->disassemble(PC, debugSymbolTable)); string mc(staticInst->disassemble(PC, debugSymbolTable));
while (mc.length() < 26) while (mc.length() < 26)
mc += " "; mc += " ";
outs << mc; outs << mc;
#else #else
outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable); outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
#endif #endif
outs << " : "; outs << " : ";
if (flags[PRINT_OP_CLASS]) { if (flags[PRINT_OP_CLASS]) {
outs << opClassStrings[staticInst->opClass()] << " : "; outs << opClassStrings[staticInst->opClass()] << " : ";
} }
if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) { if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
outs << " D="; outs << " D=";
#if 0 #if 0
if (data_status == DataDouble) if (data_status == DataDouble)
ccprintf(outs, "%f", data.as_double); ccprintf(outs, "%f", data.as_double);
else else
ccprintf(outs, "%#018x", data.as_int); ccprintf(outs, "%#018x", data.as_int);
#else #else
ccprintf(outs, "%#018x", data.as_int); ccprintf(outs, "%#018x", data.as_int);
#endif #endif
}
if (flags[PRINT_EFF_ADDR] && addr_valid)
outs << " A=0x" << hex << addr;
if (flags[PRINT_INT_REGS] && regs_valid) {
for (int i = 0; i < 32;)
for (int j = i + 1; i <= j; i++)
ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
((i == j) ? "\n" : " "));
outs << "\n";
}
if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
outs << " FetchSeq=" << dec << fetch_seq;
if (flags[PRINT_CP_SEQ] && cp_seq_valid)
outs << " CPSeq=" << dec << cp_seq;
} }
if (flags[PRINT_EFF_ADDR] && addr_valid)
outs << " A=0x" << hex << addr;
if (flags[PRINT_INT_REGS] && regs_valid) {
for (int i = 0; i < 32;)
for (int j = i + 1; i <= j; i++)
ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
((i == j) ? "\n" : " "));
outs << "\n";
}
if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
outs << " FetchSeq=" << dec << fetch_seq;
if (flags[PRINT_CP_SEQ] && cp_seq_valid)
outs << " CPSeq=" << dec << cp_seq;
// //
// End of line... // End of line...
// //
@ -172,6 +182,9 @@ Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
"print fetch sequence number", false); "print fetch sequence number", false);
Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq", Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
"print correct-path sequence number", false); "print correct-path sequence number", false);
Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
"print trace in intel compatible format", false);
// //
// Helper function for ExecutionTraceParamContext::checkParams() just // Helper function for ExecutionTraceParamContext::checkParams() just
@ -190,6 +203,7 @@ Trace::InstRecord::setParams()
flags[PRINT_INT_REGS] = exe_trace_print_iregs; flags[PRINT_INT_REGS] = exe_trace_print_iregs;
flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq; flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq;
flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq; flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq;
flags[INTEL_FORMAT] = exe_trace_intel_format;
} }
void void

View file

@ -143,6 +143,7 @@ class InstRecord : public Record
PRINT_INT_REGS, PRINT_INT_REGS,
PRINT_FETCH_SEQ, PRINT_FETCH_SEQ,
PRINT_CP_SEQ, PRINT_CP_SEQ,
INTEL_FORMAT,
NUM_BITS NUM_BITS
}; };