X86: Make the micropc available through the thread context objects.
This is necssary for fault handlers that branch to non-zero micro PCs. --HG-- extra : convert_revision : c1cb4863d779a9f4a508d0b450e64fb7a985f264
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3 changed files with 55 additions and 1 deletions
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@ -203,6 +203,16 @@ class O3ThreadContext : public ThreadContext
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/** Sets this thread's next PC. */
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/** Sets this thread's next PC. */
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virtual void setNextPC(uint64_t val);
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virtual void setNextPC(uint64_t val);
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virtual uint64_t readMicroPC()
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{ return cpu->readMicroPC(thread->readTid()); }
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virtual void setMicroPC(uint64_t val);
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virtual uint64_t readNextMicroPC()
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{ return cpu->readNextMicroPC(thread->readTid()); }
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virtual void setNextMicroPC(uint64_t val);
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/** Reads a miscellaneous register. */
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/** Reads a miscellaneous register. */
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virtual MiscReg readMiscRegNoEffect(int misc_reg)
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virtual MiscReg readMiscRegNoEffect(int misc_reg)
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{ return cpu->readMiscRegNoEffect(misc_reg, thread->readTid()); }
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{ return cpu->readMiscRegNoEffect(misc_reg, thread->readTid()); }
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@ -289,9 +289,13 @@ O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc)
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// Copy the misc regs.
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// Copy the misc regs.
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TheISA::copyMiscRegs(tc, this);
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TheISA::copyMiscRegs(tc, this);
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// Then finally set the PC and the next PC.
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// Then finally set the PC, the next PC, the nextNPC, the micropc, and the
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// next micropc.
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cpu->setPC(tc->readPC(), tid);
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cpu->setPC(tc->readPC(), tid);
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cpu->setNextPC(tc->readNextPC(), tid);
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cpu->setNextPC(tc->readNextPC(), tid);
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cpu->setNextNPC(tc->readNextNPC(), tid);
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cpu->setMicroPC(tc->readMicroPC(), tid);
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cpu->setNextMicroPC(tc->readNextMicroPC(), tid);
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#if !FULL_SYSTEM
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#if !FULL_SYSTEM
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this->thread->funcExeInst = tc->readFuncExeInst();
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this->thread->funcExeInst = tc->readFuncExeInst();
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#endif
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#endif
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@ -448,6 +452,30 @@ O3ThreadContext<Impl>::setNextPC(uint64_t val)
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}
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}
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}
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}
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template <class Impl>
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void
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O3ThreadContext<Impl>::setMicroPC(uint64_t val)
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{
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cpu->setMicroPC(val, thread->readTid());
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// Squash if we're not already in a state update mode.
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if (!thread->trapPending && !thread->inSyscall) {
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cpu->squashFromTC(thread->readTid());
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}
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}
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template <class Impl>
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void
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O3ThreadContext<Impl>::setNextMicroPC(uint64_t val)
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{
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cpu->setNextMicroPC(val, thread->readTid());
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// Squash if we're not already in a state update mode.
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if (!thread->trapPending && !thread->inSyscall) {
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cpu->squashFromTC(thread->readTid());
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}
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}
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template <class Impl>
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template <class Impl>
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void
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void
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O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
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O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
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@ -226,6 +226,14 @@ class ThreadContext
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virtual void setNextNPC(uint64_t val) = 0;
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virtual void setNextNPC(uint64_t val) = 0;
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virtual uint64_t readMicroPC() = 0;
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virtual void setMicroPC(uint64_t val) = 0;
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virtual uint64_t readNextMicroPC() = 0;
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virtual void setNextMicroPC(uint64_t val) = 0;
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virtual MiscReg readMiscRegNoEffect(int misc_reg) = 0;
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virtual MiscReg readMiscRegNoEffect(int misc_reg) = 0;
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virtual MiscReg readMiscReg(int misc_reg) = 0;
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virtual MiscReg readMiscReg(int misc_reg) = 0;
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@ -419,6 +427,14 @@ class ProxyThreadContext : public ThreadContext
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void setNextNPC(uint64_t val) { actualTC->setNextNPC(val); }
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void setNextNPC(uint64_t val) { actualTC->setNextNPC(val); }
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uint64_t readMicroPC() { return actualTC->readMicroPC(); }
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void setMicroPC(uint64_t val) { actualTC->setMicroPC(val); }
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uint64_t readNextMicroPC() { return actualTC->readMicroPC(); }
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void setNextMicroPC(uint64_t val) { actualTC->setMicroPC(val); }
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MiscReg readMiscRegNoEffect(int misc_reg)
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MiscReg readMiscRegNoEffect(int misc_reg)
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{ return actualTC->readMiscRegNoEffect(misc_reg); }
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{ return actualTC->readMiscRegNoEffect(misc_reg); }
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