Merge zizzer:/bk/newmem
into zed.eecs.umich.edu:/z/hsul/work/m5/newmem --HG-- extra : convert_revision : bb58679e101570d50c040519fb08ffbabfee7416
This commit is contained in:
commit
764f27a0c9
4 changed files with 320 additions and 62 deletions
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@ -40,26 +40,49 @@ if not m5.build_env['FULL_SYSTEM']:
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parser = optparse.OptionParser()
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parser = optparse.OptionParser()
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parser.add_option("-d", "--detailed", action="store_true")
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# Benchmark options
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parser.add_option("-t", "--timing", action="store_true")
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parser.add_option("-n", "--num_cpus", type="int", default=1)
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parser.add_option("--caches", action="store_true")
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parser.add_option("-m", "--maxtick", type="int")
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parser.add_option("--maxtime", type="float")
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parser.add_option("--dual", action="store_true",
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parser.add_option("--dual", action="store_true",
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help="Simulate two systems attached with an ethernet link")
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help="Simulate two systems attached with an ethernet link")
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parser.add_option("-b", "--benchmark", action="store", type="string",
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parser.add_option("-b", "--benchmark", action="store", type="string",
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dest="benchmark",
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dest="benchmark",
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help="Specify the benchmark to run. Available benchmarks: %s"\
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help="Specify the benchmark to run. Available benchmarks: %s"\
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% DefinedBenchmarks)
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% DefinedBenchmarks)
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# system options
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parser.add_option("-d", "--detailed", action="store_true")
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parser.add_option("-t", "--timing", action="store_true")
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parser.add_option("-n", "--num_cpus", type="int", default=1)
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parser.add_option("--caches", action="store_true")
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# Run duration options
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parser.add_option("-m", "--maxtick", type="int")
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parser.add_option("--maxtime", type="float")
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# Metafile options
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parser.add_option("--etherdump", action="store", type="string", dest="etherdump",
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parser.add_option("--etherdump", action="store", type="string", dest="etherdump",
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help="Specify the filename to dump a pcap capture of the" \
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help="Specify the filename to dump a pcap capture of the" \
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"ethernet traffic")
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"ethernet traffic")
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# Checkpointing options
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###Note that performing checkpointing via python script files will override
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###checkpoint instructions built into binaries.
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parser.add_option("--take_checkpoints", action="store", type="string",
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help="<M,N> will take checkpoint at cycle M and every N cycles \
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thereafter")
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parser.add_option("--max_checkpoints", action="store", type="int",
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help="the maximum number of checkpoints to drop",
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default=5)
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parser.add_option("--checkpoint_dir", action="store", type="string",
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parser.add_option("--checkpoint_dir", action="store", type="string",
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help="Place all checkpoints in this absolute directory")
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help="Place all checkpoints in this absolute directory")
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parser.add_option("-c", "--checkpoint", action="store", type="int",
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parser.add_option("-r", "--checkpoint_restore", action="store", type="int",
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help="restore from checkpoint <N>")
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help="restore from checkpoint <N>")
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# CPU Switching - default switch model goes from a checkpoint
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# to a timing simple CPU with caches to warm up, then to detailed CPU for
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# data measurement
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parser.add_option("-s", "--standard_switch", action="store_true",
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help="switch from one cpu mode to another")
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(options, args) = parser.parse_args()
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(options, args) = parser.parse_args()
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if args:
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if args:
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@ -74,23 +97,24 @@ class MyCache(BaseCache):
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tgts_per_mshr = 5
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tgts_per_mshr = 5
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protocol = CoherenceProtocol(protocol='moesi')
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protocol = CoherenceProtocol(protocol='moesi')
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# client system CPU is always simple... note this is an assignment of
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# driver system CPU is always simple... note this is an assignment of
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# a class, not an instance.
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# a class, not an instance.
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ClientCPUClass = AtomicSimpleCPU
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DriveCPUClass = AtomicSimpleCPU
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client_mem_mode = 'atomic'
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drive_mem_mode = 'atomic'
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# system under test can be any of these CPUs
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if options.detailed:
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if options.detailed:
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ServerCPUClass = DerivO3CPU
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TestCPUClass = DerivO3CPU
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server_mem_mode = 'timing'
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test_mem_mode = 'timing'
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elif options.timing:
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elif options.timing:
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ServerCPUClass = TimingSimpleCPU
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TestCPUClass = TimingSimpleCPU
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server_mem_mode = 'timing'
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test_mem_mode = 'timing'
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else:
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else:
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ServerCPUClass = AtomicSimpleCPU
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TestCPUClass = AtomicSimpleCPU
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server_mem_mode = 'atomic'
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test_mem_mode = 'atomic'
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ServerCPUClass.clock = '2GHz'
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TestCPUClass.clock = '2GHz'
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ClientCPUClass.clock = '2GHz'
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DriveCPUClass.clock = '2GHz'
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if options.benchmark:
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if options.benchmark:
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try:
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try:
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@ -105,39 +129,60 @@ else:
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else:
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else:
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bm = [SysConfig()]
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bm = [SysConfig()]
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server_sys = makeLinuxAlphaSystem(server_mem_mode, bm[0])
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test_sys = makeLinuxAlphaSystem(test_mem_mode, bm[0])
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np = options.num_cpus
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np = options.num_cpus
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server_sys.cpu = [ServerCPUClass(cpu_id=i) for i in xrange(np)]
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test_sys.cpu = [TestCPUClass(cpu_id=i) for i in xrange(np)]
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for i in xrange(np):
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for i in xrange(np):
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if options.caches:
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if options.caches and not options.standard_switch:
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server_sys.cpu[i].addPrivateSplitL1Caches(MyCache(size = '32kB'),
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test_sys.cpu[i].addPrivateSplitL1Caches(MyCache(size = '32kB'),
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MyCache(size = '64kB'))
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MyCache(size = '64kB'))
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server_sys.cpu[i].connectMemPorts(server_sys.membus)
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test_sys.cpu[i].connectMemPorts(test_sys.membus)
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server_sys.cpu[i].mem = server_sys.physmem
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test_sys.cpu[i].mem = test_sys.physmem
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if len(bm) == 2:
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if len(bm) == 2:
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client_sys = makeLinuxAlphaSystem(client_mem_mode, bm[1])
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drive_sys = makeLinuxAlphaSystem(drive_mem_mode, bm[1])
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client_sys.cpu = ClientCPUClass(cpu_id=0)
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drive_sys.cpu = DriveCPUClass(cpu_id=0)
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client_sys.cpu.connectMemPorts(client_sys.membus)
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drive_sys.cpu.connectMemPorts(drive_sys.membus)
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client_sys.cpu.mem = client_sys.physmem
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drive_sys.cpu.mem = drive_sys.physmem
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root = makeDualRoot(server_sys, client_sys, options.etherdump)
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root = makeDualRoot(test_sys, drive_sys, options.etherdump)
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elif len(bm) == 1:
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elif len(bm) == 1:
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root = Root(clock = '1THz', system = server_sys)
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root = Root(clock = '1THz', system = test_sys)
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else:
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else:
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print "Error I don't know how to create more than 2 systems."
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print "Error I don't know how to create more than 2 systems."
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sys.exit(1)
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sys.exit(1)
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if options.standard_switch:
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switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i) for i in xrange(np))]
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switch_cpus1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i) for i in xrange(np))]
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for i in xrange(np):
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switch_cpus[i].system = test_sys
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switch_cpus1[i].system = test_sys
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switch_cpus[i].clock = TestCPUClass.clock
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switch_cpus1[i].clock = TestCPUClass.clock
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if options.caches:
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switch_cpus[i].addPrivateSplitL1Caches(MyCache(size = '32kB'),
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MyCache(size = '64kB'))
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switch_cpus[i].mem = test_sys.physmem
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switch_cpus1[i].mem = test_sys.physmem
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switch_cpus[i].connectMemPorts(test_sys.membus)
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root.switch_cpus = switch_cpus
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root.switch_cpus1 = switch_cpus1
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switch_cpu_list = [(test_sys.cpu[i], switch_cpus[i]) for i in xrange(np)]
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switch_cpu_list1 = [(switch_cpus[i], switch_cpus1[i]) for i in xrange(np)]
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m5.instantiate(root)
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m5.instantiate(root)
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if options.checkpoint:
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from os.path import isdir
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from os import listdir, getcwd
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import re
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if options.checkpoint_dir:
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if options.checkpoint_dir:
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cptdir = options.checkpoint_dir
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cptdir = options.checkpoint_dir
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else:
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else:
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cptdir = getcwd()
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cptdir = getcwd()
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if options.checkpoint_restore:
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from os.path import isdir
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from os import listdir, getcwd
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import re
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if not isdir(cptdir):
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if not isdir(cptdir):
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m5.panic("checkpoint dir %s does not exist!" % cptdir)
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m5.panic("checkpoint dir %s does not exist!" % cptdir)
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@ -149,10 +194,26 @@ if options.checkpoint:
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if match:
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if match:
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cpts.append(match.group(1))
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cpts.append(match.group(1))
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if options.checkpoint > len(cpts):
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cpts.sort(lambda a,b: cmp(long(a), long(b)))
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m5.panic('Checkpoint %d not found' % options.checkpoint)
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m5.restoreCheckpoint(root, "/".join([cptdir, "cpt.%s" % cpts[options.checkpoint - 1]]))
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if options.checkpoint_restore > len(cpts):
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m5.panic('Checkpoint %d not found' % options.checkpoint_restore)
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m5.restoreCheckpoint(root, "/".join([cptdir, "cpt.%s" % cpts[options.checkpoint_restore - 1]]))
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if options.standard_switch:
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exit_event = m5.simulate(1000)
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## when you change to Timing (or Atomic), you halt the system given
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## as argument. When you are finished with the system changes
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## (including switchCpus), you must resume the system manually.
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## You DON'T need to resume after just switching CPUs if you haven't
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## changed anything on the system level.
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m5.changeToTiming(test_sys)
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m5.switchCpus(switch_cpu_list)
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m5.resume(test_sys)
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exit_event = m5.simulate(300000000000)
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m5.switchCpus(switch_cpu_list1)
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if options.maxtick:
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if options.maxtick:
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maxtick = options.maxtick
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maxtick = options.maxtick
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@ -163,17 +224,56 @@ elif options.maxtime:
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else:
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else:
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maxtick = -1
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maxtick = -1
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num_checkpoints = 0
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exit_cause = ''
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if options.take_checkpoints:
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[when, period] = options.take_checkpoints.split(",", 1)
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when = int(when)
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period = int(period)
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exit_event = m5.simulate(when)
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while exit_event.getCause() == "checkpoint":
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exit_event = m5.simulate(when - m5.curTick())
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if exit_event.getCause() == "simulate() limit reached":
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m5.checkpoint(root, cptdir + "cpt.%d")
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num_checkpoints += 1
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sim_ticks = when
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exit_cause = "maximum %d checkpoints dropped" % options.max_checkpoints
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while num_checkpoints < options.max_checkpoints:
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if (sim_ticks + period) > maxtick and maxtick != -1:
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exit_event = m5.simulate(maxtick - sim_ticks)
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exit_cause = exit_event.getCause()
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break
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else:
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exit_event = m5.simulate(period)
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sim_ticks += period
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|
while exit_event.getCause() == "checkpoint":
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exit_event = m5.simulate(period - m5.curTick())
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if exit_event.getCause() == "simulate() limit reached":
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m5.checkpoint(root, cptdir + "cpt.%d")
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num_checkpoints += 1
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else: #no checkpoints being taken via this script
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exit_event = m5.simulate(maxtick)
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exit_event = m5.simulate(maxtick)
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|
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while exit_event.getCause() == "checkpoint":
|
while exit_event.getCause() == "checkpoint":
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if options.checkpoint_dir:
|
m5.checkpoint(root, cptdir + "cpt.%d")
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m5.checkpoint(root, "/".join([options.checkpoint_dir, "cpt.%d"]))
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num_checkpoints += 1
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else:
|
if num_checkpoints == options.max_checkpoints:
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m5.checkpoint(root, "cpt.%d")
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exit_cause = "maximum %d checkpoints dropped" % options.max_checkpoints
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|
break
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if maxtick == -1:
|
if maxtick == -1:
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exit_event = m5.simulate(maxtick)
|
exit_event = m5.simulate(maxtick)
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else:
|
else:
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exit_event = m5.simulate(maxtick - m5.curTick())
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exit_event = m5.simulate(maxtick - m5.curTick())
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|
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print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause()
|
exit_cause = exit_event.getCause()
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|
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|
if exit_cause == '':
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|
exit_cause = exit_event.getCause()
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|
print 'Exiting @ cycle', m5.curTick(), 'because ', exit_cause
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|
|
|
@ -37,6 +37,7 @@ m5.AddToPath('../common')
|
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|
|
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parser = optparse.OptionParser()
|
parser = optparse.OptionParser()
|
||||||
|
|
||||||
|
# Benchmark options
|
||||||
parser.add_option("-c", "--cmd",
|
parser.add_option("-c", "--cmd",
|
||||||
default="../../tests/test-progs/hello/bin/alpha/linux/hello",
|
default="../../tests/test-progs/hello/bin/alpha/linux/hello",
|
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help="The binary to run in syscall emulation mode.")
|
help="The binary to run in syscall emulation mode.")
|
||||||
|
@ -45,9 +46,35 @@ parser.add_option("-o", "--options", default="",
|
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string.")
|
string.")
|
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parser.add_option("-i", "--input", default="",
|
parser.add_option("-i", "--input", default="",
|
||||||
help="A file of input to give to the binary.")
|
help="A file of input to give to the binary.")
|
||||||
|
|
||||||
|
# System options
|
||||||
parser.add_option("-d", "--detailed", action="store_true")
|
parser.add_option("-d", "--detailed", action="store_true")
|
||||||
parser.add_option("-t", "--timing", action="store_true")
|
parser.add_option("-t", "--timing", action="store_true")
|
||||||
|
parser.add_option("--caches", action="store_true")
|
||||||
|
|
||||||
|
# Run duration options
|
||||||
parser.add_option("-m", "--maxtick", type="int")
|
parser.add_option("-m", "--maxtick", type="int")
|
||||||
|
parser.add_option("--maxtime", type="float")
|
||||||
|
|
||||||
|
#Checkpointing options
|
||||||
|
###Note that performing checkpointing via python script files will override
|
||||||
|
###checkpoint instructions built into binaries.
|
||||||
|
parser.add_option("--take_checkpoints", action="store", type="string",
|
||||||
|
help="<M,N> will take checkpoint at cycle M and every N cycles \
|
||||||
|
thereafter")
|
||||||
|
parser.add_option("--max_checkpoints", action="store", type="int",
|
||||||
|
help="the maximum number of checkpoints to drop",
|
||||||
|
default=5)
|
||||||
|
parser.add_option("--checkpoint_dir", action="store", type="string",
|
||||||
|
help="Place all checkpoints in this absolute directory")
|
||||||
|
parser.add_option("-r", "--checkpoint_restore", action="store", type="int",
|
||||||
|
help="restore from checkpoint <N>")
|
||||||
|
|
||||||
|
#CPU Switching - default switch model generally goes from a checkpoint
|
||||||
|
#to a timing simple CPU with caches to warm up, then to detailed CPU for
|
||||||
|
#data measurement
|
||||||
|
parser.add_option("-s", "--standard_switch", action="store_true",
|
||||||
|
help="switch from one cpu mode to another")
|
||||||
|
|
||||||
(options, args) = parser.parse_args()
|
(options, args) = parser.parse_args()
|
||||||
|
|
||||||
|
@ -55,6 +82,13 @@ if args:
|
||||||
print "Error: script doesn't take any positional arguments"
|
print "Error: script doesn't take any positional arguments"
|
||||||
sys.exit(1)
|
sys.exit(1)
|
||||||
|
|
||||||
|
class MyCache(BaseCache):
|
||||||
|
assoc = 2
|
||||||
|
block_size = 64
|
||||||
|
latency = 1
|
||||||
|
mshrs = 10
|
||||||
|
tgts_per_mshr = 5
|
||||||
|
|
||||||
process = LiveProcess()
|
process = LiveProcess()
|
||||||
process.executable = options.cmd
|
process.executable = options.cmd
|
||||||
process.cmd = options.cmd + " " + options.options
|
process.cmd = options.cmd + " " + options.options
|
||||||
|
@ -93,25 +127,149 @@ cpu.workload = process
|
||||||
cpu.cpu_id = 0
|
cpu.cpu_id = 0
|
||||||
|
|
||||||
system = System(cpu = cpu,
|
system = System(cpu = cpu,
|
||||||
physmem = PhysicalMemory(),
|
physmem = PhysicalMemory(range=AddrRange("512MB")),
|
||||||
membus = Bus())
|
membus = Bus())
|
||||||
system.physmem.port = system.membus.port
|
system.physmem.port = system.membus.port
|
||||||
system.cpu.connectMemPorts(system.membus)
|
system.cpu.connectMemPorts(system.membus)
|
||||||
system.cpu.mem = system.physmem
|
system.cpu.mem = system.physmem
|
||||||
|
system.cpu.clock = '2GHz'
|
||||||
|
if options.caches and not options.standard_switch:
|
||||||
|
system.cpu.addPrivateSplitL1Caches(MyCache(size = '32kB'),
|
||||||
|
MyCache(size = '64kB'))
|
||||||
|
|
||||||
root = Root(system = system)
|
root = Root(system = system)
|
||||||
|
|
||||||
if options.timing or options.detailed:
|
if options.timing or options.detailed:
|
||||||
root.system.mem_mode = 'timing'
|
root.system.mem_mode = 'timing'
|
||||||
|
|
||||||
|
if options.standard_switch:
|
||||||
|
switch_cpu = TimingSimpleCPU(defer_registration=True, cpu_id=1)
|
||||||
|
switch_cpu1 = DerivO3CPU(defer_registration=True, cpu_id=2)
|
||||||
|
switch_cpu.system = system
|
||||||
|
switch_cpu1.system = system
|
||||||
|
switch_cpu.clock = cpu.clock
|
||||||
|
switch_cpu1.clock = cpu.clock
|
||||||
|
if options.caches:
|
||||||
|
switch_cpu.addPrivateSplitL1Caches(MyCache(size = '32kB'),
|
||||||
|
MyCache(size = '64kB'))
|
||||||
|
|
||||||
|
switch_cpu.workload = process
|
||||||
|
switch_cpu1.workload = process
|
||||||
|
switch_cpu.mem = system.physmem
|
||||||
|
switch_cpu1.mem = system.physmem
|
||||||
|
switch_cpu.connectMemPorts(system.membus)
|
||||||
|
root.switch_cpu = switch_cpu
|
||||||
|
root.switch_cpu1 = switch_cpu1
|
||||||
|
switch_cpu_list = [(system.cpu, switch_cpu)]
|
||||||
|
switch_cpu_list1 = [(switch_cpu, switch_cpu1)]
|
||||||
|
|
||||||
# instantiate configuration
|
# instantiate configuration
|
||||||
m5.instantiate(root)
|
m5.instantiate(root)
|
||||||
|
|
||||||
# simulate until program terminates
|
if options.checkpoint_dir:
|
||||||
if options.maxtick:
|
cptdir = options.checkpoint_dir
|
||||||
exit_event = m5.simulate(options.maxtick)
|
|
||||||
else:
|
else:
|
||||||
exit_event = m5.simulate()
|
cptdir = getcwd()
|
||||||
|
|
||||||
|
if options.checkpoint_restore:
|
||||||
|
from os.path import isdir
|
||||||
|
from os import listdir, getcwd
|
||||||
|
import re
|
||||||
|
|
||||||
|
if not isdir(cptdir):
|
||||||
|
m5.panic("checkpoint dir %s does not exist!" % cptdir)
|
||||||
|
|
||||||
|
dirs = listdir(cptdir)
|
||||||
|
expr = re.compile('cpt.([0-9]*)')
|
||||||
|
cpts = []
|
||||||
|
for dir in dirs:
|
||||||
|
match = expr.match(dir)
|
||||||
|
if match:
|
||||||
|
cpts.append(match.group(1))
|
||||||
|
|
||||||
|
cpts.sort(lambda a,b: cmp(long(a), long(b)))
|
||||||
|
|
||||||
|
if options.checkpoint_restore > len(cpts):
|
||||||
|
m5.panic('Checkpoint %d not found' % options.checkpoint_restore)
|
||||||
|
|
||||||
|
print "restoring checkpoint from ","/".join([cptdir, "cpt.%s" % cpts[options.checkpoint_restore - 1]])
|
||||||
|
m5.restoreCheckpoint(root, "/".join([cptdir, "cpt.%s" % cpts[options.checkpoint_restore - 1]]))
|
||||||
|
|
||||||
|
if options.standard_switch:
|
||||||
|
exit_event = m5.simulate(10000)
|
||||||
|
## when you change to Timing (or Atomic), you halt the system given
|
||||||
|
## as argument. When you are finished with the system changes
|
||||||
|
## (including switchCpus), you must resume the system manually.
|
||||||
|
## You DON'T need to resume after just switching CPUs if you haven't
|
||||||
|
## changed anything on the system level.
|
||||||
|
m5.changeToTiming(system)
|
||||||
|
m5.switchCpus(switch_cpu_list)
|
||||||
|
m5.resume(system)
|
||||||
|
|
||||||
|
exit_event = m5.simulate(3000000)
|
||||||
|
m5.switchCpus(switch_cpu_list1)
|
||||||
|
|
||||||
|
if options.maxtick:
|
||||||
|
maxtick = options.maxtick
|
||||||
|
elif options.maxtime:
|
||||||
|
simtime = int(options.maxtime * root.clock.value)
|
||||||
|
print "simulating for: ", simtime
|
||||||
|
maxtick = simtime
|
||||||
|
else:
|
||||||
|
maxtick = -1
|
||||||
|
|
||||||
|
num_checkpoints = 0
|
||||||
|
|
||||||
|
exit_cause = ''
|
||||||
|
|
||||||
|
if options.take_checkpoints:
|
||||||
|
[when, period] = options.take_checkpoints.split(",", 1)
|
||||||
|
when = int(when)
|
||||||
|
period = int(period)
|
||||||
|
|
||||||
|
exit_event = m5.simulate(when)
|
||||||
|
while exit_event.getCause() == "checkpoint":
|
||||||
|
exit_event = m5.simulate(when - m5.curTick())
|
||||||
|
|
||||||
|
if exit_event.getCause() == "simulate() limit reached":
|
||||||
|
m5.checkpoint(root, cptdir + "cpt.%d")
|
||||||
|
num_checkpoints += 1
|
||||||
|
|
||||||
|
sim_ticks = when
|
||||||
|
exit_cause = "maximum %d checkpoints dropped" % options.max_checkpoints
|
||||||
|
while num_checkpoints < options.max_checkpoints:
|
||||||
|
if (sim_ticks + period) > maxtick and maxtick != -1:
|
||||||
|
exit_event = m5.simulate(maxtick - sim_ticks)
|
||||||
|
exit_cause = exit_event.getCause()
|
||||||
|
break
|
||||||
|
else:
|
||||||
|
exit_event = m5.simulate(period)
|
||||||
|
sim_ticks += period
|
||||||
|
while exit_event.getCause() == "checkpoint":
|
||||||
|
exit_event = m5.simulate(period - m5.curTick())
|
||||||
|
if exit_event.getCause() == "simulate() limit reached":
|
||||||
|
m5.checkpoint(root, cptdir + "cpt.%d")
|
||||||
|
num_checkpoints += 1
|
||||||
|
|
||||||
|
else: #no checkpoints being taken via this script
|
||||||
|
exit_event = m5.simulate(maxtick)
|
||||||
|
|
||||||
|
while exit_event.getCause() == "checkpoint":
|
||||||
|
m5.checkpoint(root, cptdir + "cpt.%d")
|
||||||
|
num_checkpoints += 1
|
||||||
|
if num_checkpoints == options.max_checkpoints:
|
||||||
|
exit_cause = "maximum %d checkpoints dropped" % options.max_checkpoints
|
||||||
|
break
|
||||||
|
|
||||||
|
if maxtick == -1:
|
||||||
|
exit_event = m5.simulate(maxtick)
|
||||||
|
else:
|
||||||
|
exit_event = m5.simulate(maxtick - m5.curTick())
|
||||||
|
|
||||||
|
exit_cause = exit_event.getCause()
|
||||||
|
|
||||||
|
if exit_cause == '':
|
||||||
|
exit_cause = exit_event.getCause()
|
||||||
|
print 'Exiting @ cycle', m5.curTick(), 'because ', exit_cause
|
||||||
|
|
||||||
print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()
|
|
||||||
|
|
||||||
|
|
|
@ -183,13 +183,16 @@ AtomicSimpleCPU::unserialize(Checkpoint *cp, const string §ion)
|
||||||
void
|
void
|
||||||
AtomicSimpleCPU::resume()
|
AtomicSimpleCPU::resume()
|
||||||
{
|
{
|
||||||
|
if (_status != SwitchedOut && _status != Idle) {
|
||||||
|
assert(system->getMemoryMode() == System::Atomic);
|
||||||
|
|
||||||
changeState(SimObject::Running);
|
changeState(SimObject::Running);
|
||||||
if (thread->status() == ThreadContext::Active) {
|
if (thread->status() == ThreadContext::Active) {
|
||||||
assert(system->getMemoryMode() == System::Atomic);
|
|
||||||
if (!tickEvent.scheduled())
|
if (!tickEvent.scheduled())
|
||||||
tickEvent.schedule(curTick);
|
tickEvent.schedule(curTick);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
AtomicSimpleCPU::switchOut()
|
AtomicSimpleCPU::switchOut()
|
||||||
|
|
|
@ -150,7 +150,6 @@ def changeToAtomic(system):
|
||||||
doDrain(system)
|
doDrain(system)
|
||||||
print "Changing memory mode to atomic"
|
print "Changing memory mode to atomic"
|
||||||
system.changeTiming(cc_main.SimObject.Atomic)
|
system.changeTiming(cc_main.SimObject.Atomic)
|
||||||
resume(system)
|
|
||||||
|
|
||||||
def changeToTiming(system):
|
def changeToTiming(system):
|
||||||
if not isinstance(system, objects.Root) and not isinstance(system, objects.System):
|
if not isinstance(system, objects.Root) and not isinstance(system, objects.System):
|
||||||
|
@ -159,7 +158,6 @@ def changeToTiming(system):
|
||||||
doDrain(system)
|
doDrain(system)
|
||||||
print "Changing memory mode to timing"
|
print "Changing memory mode to timing"
|
||||||
system.changeTiming(cc_main.SimObject.Timing)
|
system.changeTiming(cc_main.SimObject.Timing)
|
||||||
resume(system)
|
|
||||||
|
|
||||||
def switchCpus(cpuList):
|
def switchCpus(cpuList):
|
||||||
print "switching cpus"
|
print "switching cpus"
|
||||||
|
@ -190,7 +188,6 @@ def switchCpus(cpuList):
|
||||||
cc_main.cleanupCountedDrain(drain_event)
|
cc_main.cleanupCountedDrain(drain_event)
|
||||||
# Now all of the CPUs are ready to be switched out
|
# Now all of the CPUs are ready to be switched out
|
||||||
for old_cpu in old_cpus:
|
for old_cpu in old_cpus:
|
||||||
print "switching"
|
|
||||||
old_cpu._ccObject.switchOut()
|
old_cpu._ccObject.switchOut()
|
||||||
index = 0
|
index = 0
|
||||||
for new_cpu in new_cpus:
|
for new_cpu in new_cpus:
|
||||||
|
|
Loading…
Reference in a new issue