diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 11d8425ce..2c2d68785 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -62,11 +62,11 @@ format WarnUnimpl { 0x00: decode OPCODE_OP_BOTTOM3 { 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: push_ES(); } 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: pop_ES(); } default: MultiInst::ADD(OPCODE_OP_BOTTOM3, @@ -76,7 +76,7 @@ } 0x01: decode OPCODE_OP_BOTTOM3 { 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: push_CS(); } //Any time this is seen, it should generate a two byte opcode @@ -89,11 +89,11 @@ } 0x02: decode OPCODE_OP_BOTTOM3 { 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: push_SS(); } 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: pop_SS(); } default: MultiInst::ADC(OPCODE_OP_BOTTOM3, @@ -103,11 +103,11 @@ } 0x03: decode OPCODE_OP_BOTTOM3 { 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: push_DS(); } 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: pop_DS(); } default: MultiInst::SBB(OPCODE_OP_BOTTOM3, @@ -119,7 +119,7 @@ 0x6: M5InternalError::error( {{"Tried to execute the ES segment override prefix!"}}); 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: daa(); } default: MultiInst::AND(OPCODE_OP_BOTTOM3, @@ -140,7 +140,7 @@ 0x6: M5InternalError::error( {{"Tried to execute the SS segment override prefix!"}}); 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: aaa(); } default: MultiInst::XOR(OPCODE_OP_BOTTOM3, @@ -152,7 +152,7 @@ 0x6: M5InternalError::error( {{"Tried to execute the DS segment override prefix!"}}); 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: aas(); } default: MultiInst::CMP(OPCODE_OP_BOTTOM3, @@ -176,15 +176,15 @@ } 0x0C: decode OPCODE_OP_BOTTOM3 { 0x0: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: pusha(); } 0x1: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: popa(); } 0x2: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: bound_Gv_Ma(); } 0x3: decode MODE_SUBMODE { @@ -257,7 +257,7 @@ 0x7: CMP(Ev,Iz); } 0x2: decode MODE_SUBMODE { - 0x0: WarnUnimpl::This_should_be_an_illegal_instruction(); + 0x0: UD2(); //default: group1_Eb_Ib(); default: decode MODRM_REG { 0x0: ADD(Eb,Ib); @@ -281,9 +281,9 @@ 0x6: XOR(Ev,Ib); 0x7: CMP(Ev,Ib); } + 0x4: Inst::TEST(Eb,Gb); + 0x5: Inst::TEST(Ev,Gv); } - 0x4: Inst::TEST(Eb,Gb); - 0x5: Inst::TEST(Ev,Gv); 0x6: xchg_Eb_Gb(); 0x7: xchg_Ev_Gv(); } @@ -305,7 +305,7 @@ 0x0: cbw_or_cwde_or_cdqe_rAX(); 0x1: cwd_or_cdq_or_cqo_rAX_rDX(); 0x2: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: call_Ap(); } 0x3: fwait(); //aka wait @@ -314,11 +314,11 @@ //Both of these should be illegal only if CPUID.AHF64=0, //according to sandpile.org 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: sahf(); } 0x7: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: lahf(); } } @@ -379,11 +379,11 @@ 0x2: ret_near_Iw(); 0x3: Inst::RET_NEAR(); 0x4: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: les_Gz_Mp(); } 0x5: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: lds_Gz_Mp(); } //0x6: group12_Eb_Ib(); @@ -403,7 +403,7 @@ 0x4: int3(); 0x5: int_Ib(); 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: into(); } 0x7: iret(); @@ -414,15 +414,15 @@ 0x2: group2_Eb_Cl(); 0x3: group2_Ev_Cl(); 0x4: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: aam_Ib(); } 0x5: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: aad_Ib(); } 0x6: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: salc(); } 0x7: xlat(); @@ -449,9 +449,9 @@ } 0x1D: decode OPCODE_OP_BOTTOM3 { 0x0: Inst::CALL_NEAR(Jz); - 0x1: jmp_Jz(); + 0x1: Inst::JMP(Jz); 0x2: decode MODE_SUBMODE { - 0x0: This_should_be_an_illegal_instruction(); + 0x0: Inst::UD2(); default: jmp_Ap(); } 0x3: Inst::JMP(Jb); @@ -480,17 +480,22 @@ 0x3: sti(); 0x4: cld(); 0x5: std(); - 0x6: group4(); + //0x6: group4(); + 0x6: decode MODRM_REG { + 0x0: Inst::INC(Eb); + 0x1: Inst::DEC(Eb); + default: Inst::UD2(); + } //0x7: group5(); 0x7: decode MODRM_REG { 0x0: Inst::INC(Ev); - 0x1: dev_Ev(); + 0x1: Inst::DEC(Ev); 0x2: call_Ev(); 0x3: call_Mp(); 0x4: jmp_Ev(); 0x5: jmp_Mp(); 0x6: push_Ev(); - 0x7: WarnUnimpl::This_should_be_an_illegal_instruction(); + 0x7: Inst::UD2(); } } } diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 383d64e5a..e5631d37b 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -80,9 +80,9 @@ 0x01: decode OPCODE_OP_BOTTOM3 { 0x0: invd(); 0x1: wbinvd(); - 0x2: This_should_be_an_illegal_instruction(); - 0x3: UD1(); - 0x4: This_should_be_an_illegal_instruction(); + 0x2: Inst::UD2(); + 0x3: UD2(); + 0x4: Inst::UD2(); 0x5: threednow(); 0x6: threednow(); 0x7: threednow(); @@ -134,7 +134,7 @@ 0x3: rdpmc(); 0x4: sysenter(); 0x5: sysexit(); - 0x6: This_should_be_an_illegal_instruction(); + 0x6: Inst::UD2(); 0x7: getsec(); } 0x07: decode OPCODE_OP_BOTTOM3 { diff --git a/src/arch/x86/isa/insts/__init__.py b/src/arch/x86/isa/insts/__init__.py index 717690926..f5c4e3113 100644 --- a/src/arch/x86/isa/insts/__init__.py +++ b/src/arch/x86/isa/insts/__init__.py @@ -69,7 +69,8 @@ categories = ["arithmetic", "rotate_and_shift", "semaphores", "string", - "system_calls"] + "system_calls", + "system"] microcode = ''' # X86 microcode diff --git a/src/arch/x86/isa/insts/system/__init__.py b/src/arch/x86/isa/insts/system/__init__.py new file mode 100644 index 000000000..72e3bdf0a --- /dev/null +++ b/src/arch/x86/isa/insts/system/__init__.py @@ -0,0 +1,62 @@ +# Copyright (c) 2007 The Hewlett-Packard Development Company +# All rights reserved. +# +# Redistribution and use of this software in source and binary forms, +# with or without modification, are permitted provided that the +# following conditions are met: +# +# The software must be used only for Non-Commercial Use which means any +# use which is NOT directed to receiving any direct monetary +# compensation for, or commercial advantage from such use. Illustrative +# examples of non-commercial use are academic research, personal study, +# teaching, education and corporate research & development. +# Illustrative examples of commercial use are distributing products for +# commercial advantage and providing services using the software for +# commercial advantage. +# +# If you wish to use this software or functionality therein that may be +# covered by patents for commercial use, please contact: +# Director of Intellectual Property Licensing +# Office of Strategy and Technology +# Hewlett-Packard Company +# 1501 Page Mill Road +# Palo Alto, California 94304 +# +# Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. Redistributions +# in binary form must reproduce the above copyright notice, this list of +# conditions and the following disclaimer in the documentation and/or +# other materials provided with the distribution. Neither the name of +# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. No right of +# sublicense is granted herewith. Derivatives of the software and +# output created using the software may be prepared, but only for +# Non-Commercial Uses. Derivatives of the software may be shared with +# others provided: (i) the others agree to abide by the list of +# conditions herein which includes the Non-Commercial Use restrictions; +# and (ii) such Derivatives of the software include the above copyright +# notice to acknowledge the contribution from this software where +# applicable, this list of conditions and the disclaimer below. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Gabe Black + +categories = ["undefined_operation"] + +microcode = "" +for category in categories: + exec "import %s as cat" % category + microcode += cat.microcode + diff --git a/src/arch/x86/isa/insts/system/undefined_operation.py b/src/arch/x86/isa/insts/system/undefined_operation.py new file mode 100644 index 000000000..e5544b6e7 --- /dev/null +++ b/src/arch/x86/isa/insts/system/undefined_operation.py @@ -0,0 +1,61 @@ +# Copyright (c) 2007 The Hewlett-Packard Development Company +# All rights reserved. +# +# Redistribution and use of this software in source and binary forms, +# with or without modification, are permitted provided that the +# following conditions are met: +# +# The software must be used only for Non-Commercial Use which means any +# use which is NOT directed to receiving any direct monetary +# compensation for, or commercial advantage from such use. Illustrative +# examples of non-commercial use are academic research, personal study, +# teaching, education and corporate research & development. +# Illustrative examples of commercial use are distributing products for +# commercial advantage and providing services using the software for +# commercial advantage. +# +# If you wish to use this software or functionality therein that may be +# covered by patents for commercial use, please contact: +# Director of Intellectual Property Licensing +# Office of Strategy and Technology +# Hewlett-Packard Company +# 1501 Page Mill Road +# Palo Alto, California 94304 +# +# Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. Redistributions +# in binary form must reproduce the above copyright notice, this list of +# conditions and the following disclaimer in the documentation and/or +# other materials provided with the distribution. Neither the name of +# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. No right of +# sublicense is granted herewith. Derivatives of the software and +# output created using the software may be prepared, but only for +# Non-Commercial Uses. Derivatives of the software may be shared with +# others provided: (i) the others agree to abide by the list of +# conditions herein which includes the Non-Commercial Use restrictions; +# and (ii) such Derivatives of the software include the above copyright +# notice to acknowledge the contribution from this software where +# applicable, this list of conditions and the disclaimer below. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Gabe Black + +microcode = ''' +def macroop UD2 +{ + fault "new X86Fault" +}; +'''