Flattening and syscallReturn fixes

src/cpu/o3/thread_context_impl.hh:
    Use flattened indices
src/cpu/simple_thread.hh:
    Use flattened indices, and pass a thread context to setSyscallReturn rather than a register file.
src/cpu/thread_context.hh:
    The SyscallReturn class is no longer in arch/syscallreturn.hh

--HG--
extra : convert_revision : ed84bb8ac5ef0774526ecd0d7270b0c60cd3708e
This commit is contained in:
Gabe Black 2006-12-06 06:00:04 -05:00
parent 1886795368
commit 75b93179ab
3 changed files with 13 additions and 6 deletions

View file

@ -29,6 +29,7 @@
* Korey Sewell * Korey Sewell
*/ */
#include "arch/regfile.hh"
#include "cpu/o3/thread_context.hh" #include "cpu/o3/thread_context.hh"
#include "cpu/quiesce_event.hh" #include "cpu/quiesce_event.hh"
@ -303,6 +304,7 @@ template <class Impl>
uint64_t uint64_t
O3ThreadContext<Impl>::readIntReg(int reg_idx) O3ThreadContext<Impl>::readIntReg(int reg_idx)
{ {
reg_idx = TheISA::flattenIntIndex(this, reg_idx);
return cpu->readArchIntReg(reg_idx, thread->readTid()); return cpu->readArchIntReg(reg_idx, thread->readTid());
} }
@ -347,6 +349,7 @@ template <class Impl>
void void
O3ThreadContext<Impl>::setIntReg(int reg_idx, uint64_t val) O3ThreadContext<Impl>::setIntReg(int reg_idx, uint64_t val)
{ {
reg_idx = TheISA::flattenIntIndex(this, reg_idx);
cpu->setArchIntReg(reg_idx, val, thread->readTid()); cpu->setArchIntReg(reg_idx, val, thread->readTid());
// Squash if we're not already in a state update mode. // Squash if we're not already in a state update mode.

View file

@ -33,6 +33,8 @@
#define __CPU_SIMPLE_THREAD_HH__ #define __CPU_SIMPLE_THREAD_HH__
#include "arch/isa_traits.hh" #include "arch/isa_traits.hh"
#include "arch/regfile.hh"
#include "arch/syscallreturn.hh"
#include "config/full_system.hh" #include "config/full_system.hh"
#include "cpu/thread_context.hh" #include "cpu/thread_context.hh"
#include "cpu/thread_state.hh" #include "cpu/thread_state.hh"
@ -319,7 +321,7 @@ class SimpleThread : public ThreadState
// //
uint64_t readIntReg(int reg_idx) uint64_t readIntReg(int reg_idx)
{ {
return regs.readIntReg(reg_idx); return regs.readIntReg(TheISA::flattenIntIndex(getTC(), reg_idx));
} }
FloatReg readFloatReg(int reg_idx, int width) FloatReg readFloatReg(int reg_idx, int width)
@ -344,7 +346,7 @@ class SimpleThread : public ThreadState
void setIntReg(int reg_idx, uint64_t val) void setIntReg(int reg_idx, uint64_t val)
{ {
regs.setIntReg(reg_idx, val); regs.setIntReg(TheISA::flattenIntIndex(getTC(), reg_idx), val);
} }
void setFloatReg(int reg_idx, FloatReg val, int width) void setFloatReg(int reg_idx, FloatReg val, int width)
@ -445,18 +447,20 @@ class SimpleThread : public ThreadState
#if !FULL_SYSTEM #if !FULL_SYSTEM
TheISA::IntReg getSyscallArg(int i) TheISA::IntReg getSyscallArg(int i)
{ {
return regs.readIntReg(TheISA::ArgumentReg0 + i); return regs.readIntReg(TheISA::flattenIntIndex(getTC(),
TheISA::ArgumentReg0 + i));
} }
// used to shift args for indirect syscall // used to shift args for indirect syscall
void setSyscallArg(int i, TheISA::IntReg val) void setSyscallArg(int i, TheISA::IntReg val)
{ {
regs.setIntReg(TheISA::ArgumentReg0 + i, val); regs.setIntReg(TheISA::flattenIntIndex(getTC(),
TheISA::ArgumentReg0 + i), val);
} }
void setSyscallReturn(SyscallReturn return_value) void setSyscallReturn(SyscallReturn return_value)
{ {
TheISA::setSyscallReturn(return_value, &regs); TheISA::setSyscallReturn(return_value, getTC());
} }
void syscall(int64_t callnum) void syscall(int64_t callnum)

View file

@ -32,13 +32,13 @@
#define __CPU_THREAD_CONTEXT_HH__ #define __CPU_THREAD_CONTEXT_HH__
#include "arch/regfile.hh" #include "arch/regfile.hh"
#include "arch/syscallreturn.hh"
#include "arch/types.hh" #include "arch/types.hh"
#include "config/full_system.hh" #include "config/full_system.hh"
#include "mem/request.hh" #include "mem/request.hh"
#include "sim/faults.hh" #include "sim/faults.hh"
#include "sim/host.hh" #include "sim/host.hh"
#include "sim/serialize.hh" #include "sim/serialize.hh"
#include "sim/syscallreturn.hh"
#include "sim/byteswap.hh" #include "sim/byteswap.hh"
// @todo: Figure out a more architecture independent way to obtain the ITB and // @todo: Figure out a more architecture independent way to obtain the ITB and