diff --git a/src/arch/hsail/gen.py b/src/arch/hsail/gen.py
index 92fc5c510..ec6ceec3d 100755
--- a/src/arch/hsail/gen.py
+++ b/src/arch/hsail/gen.py
@@ -776,6 +776,52 @@ gen('Call', base_class='SpecialInstNoSrcNoDest')
 # Generate file epilogs
 #
 ###############
+header_code('''
+template<>
+inline void
+Abs<U32>::execute(GPUDynInstPtr gpuDynInst)
+{
+    Wavefront *w = gpuDynInst->wavefront();
+
+    const VectorMask &mask = w->getPred();
+
+    for (int lane = 0; lane < w->computeUnit->wfSize(); ++lane) {
+        if (mask[lane]) {
+            CType dest_val;
+            CType src_val;
+
+            src_val = this->src[0].template get<CType>(w, lane);
+
+            dest_val = (CType)(src_val);
+
+            this->dest.set(w, lane, dest_val);
+        }
+    }
+}
+
+template<>
+inline void
+Abs<U64>::execute(GPUDynInstPtr gpuDynInst)
+{
+    Wavefront *w = gpuDynInst->wavefront();
+
+    const VectorMask &mask = w->getPred();
+
+    for (int lane = 0; lane < w->computeUnit->wfSize(); ++lane) {
+        if (mask[lane]) {
+            CType dest_val;
+            CType src_val;
+
+            src_val = this->src[0].template get<CType>(w, lane);
+
+            dest_val = (CType)(src_val);
+
+            this->dest.set(w, lane, dest_val);
+        }
+    }
+}
+''')
+
 header_code.dedent()
 header_code('''
 } // namespace HsailISA
diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index 66a520bc3..4b71357b0 100644
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -73,7 +73,10 @@ static const int ArgumentReg[] = {
     INTREG_R8W,
     INTREG_R9W
 };
-static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
+
+static const int NumArgumentRegs M5_VAR_USED =
+    sizeof(ArgumentReg) / sizeof(const int);
+
 static const int ArgumentReg32[] = {
     INTREG_EBX,
     INTREG_ECX,
@@ -82,7 +85,9 @@ static const int ArgumentReg32[] = {
     INTREG_EDI,
     INTREG_EBP
 };
-static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int);
+
+static const int NumArgumentRegs32 M5_VAR_USED =
+    sizeof(ArgumentReg) / sizeof(const int);
 
 X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
         SyscallDesc *_syscallDescs, int _numSyscallDescs) :
diff --git a/src/gpu-compute/gpu_static_inst.hh b/src/gpu-compute/gpu_static_inst.hh
index e851c52e6..372eee8df 100644
--- a/src/gpu-compute/gpu_static_inst.hh
+++ b/src/gpu-compute/gpu_static_inst.hh
@@ -221,7 +221,6 @@ class GPUStaticInst : public GPUStaticInstFlags
 
     void setFlag(Flags flag) { _flags[flag] = true; }
 
-  protected:
     virtual void
     execLdAcq(GPUDynInstPtr gpuDynInst)
     {
@@ -246,6 +245,7 @@ class GPUStaticInst : public GPUStaticInstFlags
         fatal("calling execAtomicAcq() on a non-atomic instruction.\n");
     }
 
+  protected:
     const std::string opcode;
     std::string disassembly;
     int _instNum;
diff --git a/src/gpu-compute/gpu_tlb.cc b/src/gpu-compute/gpu_tlb.cc
index 2021af9a9..1f1a4cc61 100644
--- a/src/gpu-compute/gpu_tlb.cc
+++ b/src/gpu-compute/gpu_tlb.cc
@@ -71,16 +71,15 @@ namespace X86ISA
         accessDistance = p->accessDistance;
         clock = p->clk_domain->clockPeriod();
 
-        tlb = new GpuTlbEntry[size];
-        std::memset(tlb, 0, sizeof(GpuTlbEntry) * size);
+        tlb.assign(size, GpuTlbEntry());
 
         freeList.resize(numSets);
         entryList.resize(numSets);
 
         for (int set = 0; set < numSets; ++set) {
             for (int way = 0; way < assoc; ++way) {
-                int x = set*assoc + way;
-                freeList[set].push_back(&tlb[x]);
+                int x = set * assoc + way;
+                freeList[set].push_back(&tlb.at(x));
             }
         }
 
@@ -133,9 +132,6 @@ namespace X86ISA
     {
         // make sure all the hash-maps are empty
         assert(translationReturnEvent.empty());
-
-        // delete the TLB
-        delete[] tlb;
     }
 
     BaseSlavePort&
diff --git a/src/gpu-compute/gpu_tlb.hh b/src/gpu-compute/gpu_tlb.hh
index 3549c598b..9c1a7b326 100644
--- a/src/gpu-compute/gpu_tlb.hh
+++ b/src/gpu-compute/gpu_tlb.hh
@@ -170,7 +170,7 @@ namespace X86ISA
          */
         bool accessDistance;
 
-        GpuTlbEntry *tlb;
+        std::vector<GpuTlbEntry> tlb;
 
         /*
          * It's a per-set list. As long as we have not reached
diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 6a398423f..3f88d8387 100644
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -459,6 +459,7 @@ void unset_tbe(${{self.TBEType.c_ident}}*& m_tbe_ptr);
 #include <typeinfo>
 
 #include "base/compiler.hh"
+#include "mem/ruby/common/BoolVec.hh"
 #include "base/cprintf.hh"
 
 ''')