refactor code for the packet, get rid of packet_impl.hh
and call it packet_access.hh and fix the #includes so things compile right. --HG-- extra : convert_revision : d3626c9715b9f7e51bb3ab8d97e971fad4e0b724
This commit is contained in:
parent
5b246a0567
commit
7245d4530d
30 changed files with 174 additions and 57 deletions
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@ -73,8 +73,9 @@ output exec {{
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#include "config/ss_compatible_fp.hh"
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#include "cpu/base.hh"
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#include "cpu/exetrace.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/sim_exit.hh"
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#include "mem/packet_impl.hh"
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using namespace AlphaISA;
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}};
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@ -74,8 +74,9 @@ output exec {{
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#endif
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#include "cpu/base.hh"
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#include "cpu/exetrace.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/sim_exit.hh"
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#include "mem/packet_impl.hh"
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using namespace MipsISA;
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}};
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@ -34,10 +34,8 @@
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#include "cpu/base.hh"
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#include "cpu/checker/cpu.hh"
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#include "cpu/simple_thread.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/static_inst.hh"
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#include "mem/packet_impl.hh"
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#include "sim/byteswap.hh"
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#include "cpu/thread_context.hh"
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#if FULL_SYSTEM
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#include "arch/vtophys.hh"
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@ -37,8 +37,6 @@
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#include "cpu/simple_thread.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/static_inst.hh"
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#include "mem/packet_impl.hh"
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#include "sim/byteswap.hh"
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#include "sim/sim_object.hh"
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#include "sim/stats.hh"
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@ -38,17 +38,17 @@
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#include "base/misc.hh"
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#include "base/statistics.hh"
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//#include "cpu/simple_thread.hh"
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#include "cpu/memtest/memtest.hh"
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//#include "cpu/simple_thread.hh"
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//#include "mem/cache/base_cache.hh"
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#include "mem/mem_object.hh"
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#include "mem/port.hh"
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#include "mem/packet.hh"
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//#include "mem/physical.hh"
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#include "mem/request.hh"
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#include "sim/builder.hh"
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#include "sim/sim_events.hh"
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#include "sim/stats.hh"
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#include "mem/packet.hh"
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#include "mem/request.hh"
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#include "mem/port.hh"
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#include "mem/mem_object.hh"
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using namespace std;
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@ -36,7 +36,7 @@
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#include "base/statistics.hh"
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#include "base/timebuf.hh"
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#include "cpu/pc_event.hh"
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#include "mem/packet_impl.hh"
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#include "mem/packet.hh"
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#include "mem/port.hh"
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#include "sim/eventq.hh"
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@ -40,7 +40,7 @@
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#include "config/full_system.hh"
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#include "base/hashmap.hh"
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#include "cpu/inst_seq.hh"
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#include "mem/packet_impl.hh"
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#include "mem/packet.hh"
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#include "mem/port.hh"
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/**
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@ -32,7 +32,8 @@
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#include "arch/utility.hh"
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#include "cpu/exetrace.hh"
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#include "cpu/simple/atomic.hh"
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#include "mem/packet_impl.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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@ -47,7 +47,7 @@
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#include "cpu/static_inst.hh"
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#include "cpu/thread_context.hh"
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#include "kern/kernel_stats.hh"
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#include "mem/packet_impl.hh"
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#include "mem/packet.hh"
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#include "sim/builder.hh"
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#include "sim/byteswap.hh"
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#include "sim/debug.hh"
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@ -32,7 +32,8 @@
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#include "arch/utility.hh"
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#include "cpu/exetrace.hh"
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#include "cpu/simple/timing.hh"
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#include "mem/packet_impl.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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@ -48,6 +48,8 @@
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#include "dev/platform.hh"
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#include "dev/simconsole.hh"
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#include "dev/simple_disk.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "mem/physical.hh"
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#include "sim/builder.hh"
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#include "sim/sim_object.hh"
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@ -43,6 +43,7 @@
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#include "dev/pcireg.h"
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#include "dev/platform.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/sim_object.hh"
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#include "sim/byteswap.hh"
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@ -33,9 +33,9 @@
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#define __DEV_IO_DEVICE_HH__
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#include "mem/mem_object.hh"
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#include "mem/packet_impl.hh"
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#include "sim/sim_object.hh"
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#include "mem/packet.hh"
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#include "mem/tport.hh"
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#include "sim/sim_object.hh"
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class Event;
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class Platform;
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@ -40,6 +40,7 @@
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#include "base/trace.hh"
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#include "dev/isa_fake.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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@ -36,9 +36,10 @@
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#ifndef __ISA_FAKE_HH__
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#define __ISA_FAKE_HH__
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#include "dev/tsunami.hh"
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#include "base/range.hh"
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#include "dev/io_device.hh"
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#include "dev/tsunami.hh"
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#include "mem/packet.hh"
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/**
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* IsaFake is a device that returns -1 on all reads and
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@ -43,6 +43,7 @@
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#include "dev/ns_gige.hh"
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#include "dev/pciconfigall.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/debug.hh"
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#include "sim/host.hh"
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#include "dev/pcireg.h"
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#include "dev/platform.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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#include "dev/pcidev.hh"
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#include "dev/tsunamireg.h"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/byteswap.hh"
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#include "sim/param.hh"
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#include "dev/io_device.hh"
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#include "dev/pcireg.h"
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#include "dev/platform.hh"
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#include "sim/byteswap.hh"
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#define BAR_IO_MASK 0x3
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#define BAR_MEM_MASK 0xF
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#include "dev/etherlink.hh"
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#include "dev/sinic.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/debug.hh"
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#include "sim/eventq.hh"
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@ -39,12 +39,14 @@
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#include "arch/alpha/ev5.hh"
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#include "base/trace.hh"
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#include "cpu/intr_control.hh"
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#include "cpu/thread_context.hh"
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#include "dev/tsunami.hh"
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#include "dev/tsunami_cchip.hh"
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#include "dev/tsunamireg.h"
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#include "dev/tsunami.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "mem/port.hh"
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#include "cpu/thread_context.hh"
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#include "cpu/intr_control.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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#include "dev/tsunami.hh"
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#include "dev/tsunami_io.hh"
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#include "dev/tsunamireg.h"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "mem/port.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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#include "dev/tsunamireg.h"
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#include "dev/tsunami.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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#include "sim/system.hh"
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#include "dev/simconsole.hh"
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#include "dev/uart8250.hh"
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#include "dev/platform.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "sim/builder.hh"
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using namespace std;
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5
src/mem/cache/base_cache.cc
vendored
5
src/mem/cache/base_cache.cc
vendored
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* Definition of BaseCache functions.
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*/
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#include "cpu/base.hh"
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#include "cpu/smt.hh"
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#include "mem/cache/base_cache.hh"
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#include "mem/cache/miss/mshr.hh"
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#include "mem/packet_impl.hh"
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#include "cpu/smt.hh"
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#include "cpu/base.hh"
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using namespace std;
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*/
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#include <iostream>
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#include "base/misc.hh"
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#include "mem/packet.hh"
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#include "base/trace.hh"
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#include "mem/packet.hh"
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static const std::string ReadReqString("ReadReq");
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static const std::string WriteReqString("WriteReq");
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#ifndef __MEM_PACKET_HH__
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#define __MEM_PACKET_HH__
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#include <cassert>
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#include <list>
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#include "mem/request.hh"
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#include "sim/host.hh"
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#include "sim/root.hh"
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#include <list>
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#include <cassert>
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struct Packet;
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typedef Packet* PacketPtr;
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@ -342,10 +343,12 @@ class Packet
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srcValid = false;
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}
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/** Take a request packet and modify it in place to be suitable
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* for returning as a response to that request.
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/**
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* Take a request packet and modify it in place to be suitable for
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* returning as a response to that request.
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*/
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void makeAtomicResponse() {
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void makeAtomicResponse()
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{
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assert(needsResponse());
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assert(isRequest());
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int icmd = (int)cmd;
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@ -358,43 +361,83 @@ class Packet
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cmd = (Command)icmd;
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}
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/** Take a request packet that has been returned as NACKED and modify it so
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* that it can be sent out again. Only packets that need a response can be
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* NACKED, so verify that that is true. */
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void reinitNacked() {
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/**
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* Take a request packet that has been returned as NACKED and
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* modify it so that it can be sent out again. Only packets that
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* need a response can be NACKED, so verify that that is true.
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*/
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void
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reinitNacked()
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{
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assert(needsResponse() && result == Nacked);
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dest = Broadcast;
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result = Unknown;
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}
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/** Set the data pointer to the following value that should not be freed. */
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template <typename T>
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void dataStatic(T *p);
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/** Set the data pointer to a value that should have delete [] called on it.
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/**
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* Set the data pointer to the following value that should not be
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* freed.
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*/
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template <typename T>
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void dataDynamicArray(T *p);
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void
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dataStatic(T *p)
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{
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if(dynamicData)
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dynamicData = false;
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data = (PacketDataPtr)p;
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staticData = true;
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}
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/** set the data pointer to a value that should have delete called on it. */
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/**
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* Set the data pointer to a value that should have delete []
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* called on it.
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*/
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template <typename T>
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void dataDynamic(T *p);
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void
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dataDynamicArray(T *p)
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{
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assert(!staticData && !dynamicData);
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data = (PacketDataPtr)p;
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dynamicData = true;
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arrayData = true;
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}
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/**
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* set the data pointer to a value that should have delete called
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* on it.
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*/
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template <typename T>
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void
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dataDynamic(T *p)
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{
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assert(!staticData && !dynamicData);
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data = (PacketDataPtr)p;
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dynamicData = true;
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arrayData = false;
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}
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/** get a pointer to the data ptr. */
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template <typename T>
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T*
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getPtr()
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{
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assert(staticData || dynamicData);
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return (T*)data;
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}
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/** return the value of what is pointed to in the packet. */
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template <typename T>
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T get();
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/** get a pointer to the data ptr. */
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template <typename T>
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T* getPtr();
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/** set the value in the data pointer to v. */
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template <typename T>
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void set(T v);
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/** delete the data pointed to in the data pointer. Ok to call to matter how
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* data was allocted. */
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/**
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* delete the data pointed to in the data pointer. Ok to call to
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* matter how data was allocted.
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*/
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void deleteData();
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/** If there isn't data in the packet, allocate some. */
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|
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62
src/mem/packet_access.hh
Normal file
62
src/mem/packet_access.hh
Normal file
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@ -0,0 +1,62 @@
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/*
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* Copyright (c) 2006 The Regents of The University of Michigan
|
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* All rights reserved.
|
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*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are
|
||||
* met: redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer;
|
||||
* redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution;
|
||||
* neither the name of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
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*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
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*
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||||
* Authors: Ali Saidi
|
||||
* Nathan Binkert
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||||
*/
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|
||||
#include "arch/isa_traits.hh"
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#include "mem/packet.hh"
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#include "sim/byteswap.hh"
|
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|
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#ifndef __MEM_PACKET_ACCESS_HH__
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#define __MEM_PACKET_ACCESS_HH__
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// The memory system needs to have an endianness. This is the easiest
|
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// way to deal with it for now. At some point, we will have to remove
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// these functions and make the users do their own byte swapping since
|
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// the memory system does not in fact have an endianness.
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|
||||
/** return the value of what is pointed to in the packet. */
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template <typename T>
|
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inline T
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Packet::get()
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||||
{
|
||||
assert(staticData || dynamicData);
|
||||
assert(sizeof(T) <= size);
|
||||
return TheISA::gtoh(*(T*)data);
|
||||
}
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||||
|
||||
/** set the value in the data pointer to v. */
|
||||
template <typename T>
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inline void
|
||||
Packet::set(T v)
|
||||
{
|
||||
assert(sizeof(T) <= size);
|
||||
*(T*)data = TheISA::htog(v);
|
||||
}
|
||||
|
||||
#endif //__MEM_PACKET_ACCESS_HH__
|
|
@ -39,21 +39,17 @@
|
|||
#include <iostream>
|
||||
#include <string>
|
||||
|
||||
|
||||
#include "arch/isa_traits.hh"
|
||||
#include "base/misc.hh"
|
||||
#include "config/full_system.hh"
|
||||
#include "mem/packet_impl.hh"
|
||||
#include "mem/physical.hh"
|
||||
#include "sim/host.hh"
|
||||
#include "sim/builder.hh"
|
||||
#include "sim/eventq.hh"
|
||||
#include "arch/isa_traits.hh"
|
||||
|
||||
#include "sim/host.hh"
|
||||
|
||||
using namespace std;
|
||||
using namespace TheISA;
|
||||
|
||||
|
||||
PhysicalMemory::PhysicalMemory(Params *p)
|
||||
: MemObject(p->name), pmemAddr(NULL), port(NULL), lat(p->latency), _params(p)
|
||||
{
|
||||
|
|
|
@ -35,7 +35,6 @@
|
|||
|
||||
#include "base/chunk_generator.hh"
|
||||
#include "base/trace.hh"
|
||||
#include "mem/packet_impl.hh"
|
||||
#include "mem/port.hh"
|
||||
|
||||
void
|
||||
|
|
Loading…
Reference in a new issue