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config: Reduce DRAM controller regression traffic rate

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This patch changes the traffic generator period such that it does not
completely saturate the DRAM controller and create an ever-growing
backlog in the queued port.

A separate patch updates the stats.
This commit is contained in:
Andreas Hansson 2013-01-07 13:05:36 -05:00
parent f22d3bb9c3
commit 7216681561
1 changed files with 1 additions and 3 deletions
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4
tests/quick/se/70.tgen/tgen-simple-dram.cfg
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@ -21,9 +21,7 @@
# interval. If a specific value is desired, then the min and max can # interval. If a specific value is desired, then the min and max can
# be set to the same value. # be set to the same value.
STATE 0 100 IDLE STATE 0 100 IDLE
#STATE 1 10000000000 TRACE tests/quick/se/70.tgen/tgen-simple-dram.trc 0 STATE 1 1000000000 LINEAR 100 0 134217728 64 30000 30000 0
#STATE 1 1000000000 RANDOM 101 0 134217728 64 2000 2000 0
STATE 1 1000000000 LINEAR 100 0 134217728 64 2000 2000 0
INIT 0 INIT 0
TRANSITION 0 1 1 TRANSITION 0 1 1
TRANSITION 1 1 1 TRANSITION 1 1 1