CPU: Update where the simple cpus read their cpu id from the thread context to init() to make sure they read the right value. This fixes a bug with multi-processor full-system configurations.

--HG--
extra : convert_revision : 4f2801967a271b43817d88e147c2f80c4480b2c3
This commit is contained in:
Ali Saidi 2007-12-16 03:48:13 -05:00
parent b7ea470a97
commit 71909a50de
3 changed files with 10 additions and 6 deletions

View file

@ -79,12 +79,13 @@ void
AtomicSimpleCPU::init() AtomicSimpleCPU::init()
{ {
BaseCPU::init(); BaseCPU::init();
cpuId = tc->readCpuId();
#if FULL_SYSTEM #if FULL_SYSTEM
for (int i = 0; i < threadContexts.size(); ++i) { for (int i = 0; i < threadContexts.size(); ++i) {
ThreadContext *tc = threadContexts[i]; ThreadContext *tc = threadContexts[i];
// initialize CPU, including PC // initialize CPU, including PC
TheISA::initCPU(tc, tc->readCpuId()); TheISA::initCPU(tc, cpuId);
} }
#endif #endif
if (hasPhysMemPort) { if (hasPhysMemPort) {
@ -93,6 +94,9 @@ AtomicSimpleCPU::init()
physmemPort.getPeerAddressRanges(pmAddrList, snoop); physmemPort.getPeerAddressRanges(pmAddrList, snoop);
physMemAddr = *pmAddrList.begin(); physMemAddr = *pmAddrList.begin();
} }
ifetch_req.setThreadContext(cpuId, 0); // Add thread ID if we add MT
data_read_req.setThreadContext(cpuId, 0); // Add thread ID here too
data_write_req.setThreadContext(cpuId, 0); // Add thread ID here too
} }
bool bool
@ -159,9 +163,6 @@ AtomicSimpleCPU::AtomicSimpleCPU(Params *p)
icachePort.snoopRangeSent = false; icachePort.snoopRangeSent = false;
dcachePort.snoopRangeSent = false; dcachePort.snoopRangeSent = false;
ifetch_req.setThreadContext(cpuId, 0); // Add thread ID if we add MT
data_read_req.setThreadContext(cpuId, 0); // Add thread ID here too
data_write_req.setThreadContext(cpuId, 0); // Add thread ID here too
} }
@ -240,6 +241,9 @@ AtomicSimpleCPU::takeOverFrom(BaseCPU *oldCPU)
} }
assert(threadContexts.size() == 1); assert(threadContexts.size() == 1);
cpuId = tc->readCpuId(); cpuId = tc->readCpuId();
ifetch_req.setThreadContext(cpuId, 0); // Add thread ID if we add MT
data_read_req.setThreadContext(cpuId, 0); // Add thread ID here too
data_write_req.setThreadContext(cpuId, 0); // Add thread ID here too
} }

View file

@ -91,7 +91,6 @@ BaseSimpleCPU::BaseSimpleCPU(Params *p)
threadContexts.push_back(tc); threadContexts.push_back(tc);
cpuId = tc->readCpuId();
fetchOffset = 0; fetchOffset = 0;
stayAtPC = false; stayAtPC = false;

View file

@ -57,12 +57,13 @@ void
TimingSimpleCPU::init() TimingSimpleCPU::init()
{ {
BaseCPU::init(); BaseCPU::init();
cpuId = tc->readCpuId();
#if FULL_SYSTEM #if FULL_SYSTEM
for (int i = 0; i < threadContexts.size(); ++i) { for (int i = 0; i < threadContexts.size(); ++i) {
ThreadContext *tc = threadContexts[i]; ThreadContext *tc = threadContexts[i];
// initialize CPU, including PC // initialize CPU, including PC
TheISA::initCPU(tc, tc->readCpuId()); TheISA::initCPU(tc, cpuId);
} }
#endif #endif
} }