ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers.
This commit is contained in:
parent
89b1dd5582
commit
6fb5189c47
2 changed files with 15 additions and 5 deletions
|
@ -128,6 +128,15 @@ def format McrMrc15() {{
|
||||||
case MISCREG_BPIALL:
|
case MISCREG_BPIALL:
|
||||||
return new WarnUnimplemented(
|
return new WarnUnimplemented(
|
||||||
isRead ? "mrc bpiall" : "mcr bpiall", machInst);
|
isRead ? "mrc bpiall" : "mcr bpiall", machInst);
|
||||||
|
case MISCREG_DRBAR:
|
||||||
|
return new WarnUnimplemented(
|
||||||
|
isRead ? "mrc drbar" : "mcr drbar", machInst);
|
||||||
|
case MISCREG_DRACR:
|
||||||
|
return new WarnUnimplemented(
|
||||||
|
isRead ? "mrc dracr" : "mcr dracr", machInst);
|
||||||
|
case MISCREG_DRSR:
|
||||||
|
return new WarnUnimplemented(
|
||||||
|
isRead ? "mrc drsr" : "mcr drsr", machInst);
|
||||||
default:
|
default:
|
||||||
if (isRead) {
|
if (isRead) {
|
||||||
return new Mrc15(machInst, rt, (IntRegIndex)miscReg);
|
return new Mrc15(machInst, rt, (IntRegIndex)miscReg);
|
||||||
|
|
|
@ -105,6 +105,9 @@ namespace ArmISA
|
||||||
MISCREG_MPUIR,
|
MISCREG_MPUIR,
|
||||||
MISCREG_MIDR,
|
MISCREG_MIDR,
|
||||||
MISCREG_RGNR,
|
MISCREG_RGNR,
|
||||||
|
MISCREG_DRBAR,
|
||||||
|
MISCREG_DRACR,
|
||||||
|
MISCREG_DRSR,
|
||||||
MISCREG_CP15_UNIMP_START,
|
MISCREG_CP15_UNIMP_START,
|
||||||
MISCREG_CTR = MISCREG_CP15_UNIMP_START,
|
MISCREG_CTR = MISCREG_CP15_UNIMP_START,
|
||||||
MISCREG_TCMTR,
|
MISCREG_TCMTR,
|
||||||
|
@ -131,11 +134,8 @@ namespace ArmISA
|
||||||
MISCREG_AIFSR,
|
MISCREG_AIFSR,
|
||||||
MISCREG_DFAR,
|
MISCREG_DFAR,
|
||||||
MISCREG_IFAR,
|
MISCREG_IFAR,
|
||||||
MISCREG_DRBAR,
|
|
||||||
MISCREG_IRBAR,
|
MISCREG_IRBAR,
|
||||||
MISCREG_DRSR,
|
|
||||||
MISCREG_IRSR,
|
MISCREG_IRSR,
|
||||||
MISCREG_DRACR,
|
|
||||||
MISCREG_IRACR,
|
MISCREG_IRACR,
|
||||||
MISCREG_DCIMVAC,
|
MISCREG_DCIMVAC,
|
||||||
MISCREG_DCISW,
|
MISCREG_DCISW,
|
||||||
|
@ -164,13 +164,14 @@ namespace ArmISA
|
||||||
"clidr", "ccsidr", "csselr",
|
"clidr", "ccsidr", "csselr",
|
||||||
"icialluis", "iciallu", "icimvau",
|
"icialluis", "iciallu", "icimvau",
|
||||||
"bpimva", "bpiallis", "bpiall",
|
"bpimva", "bpiallis", "bpiall",
|
||||||
"mpuir", "midr", "rgnr", "ctr", "tcmtr", "mpidr",
|
"mpuir", "midr", "rgnr", "drbar", "dracr", "drsr",
|
||||||
|
"ctr", "tcmtr", "mpidr",
|
||||||
"id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
|
"id_pfr0", "id_pfr1", "id_dfr0", "id_afr0",
|
||||||
"id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
|
"id_mmfr0", "id_mmfr1", "id_mmfr2", "id_mmfr3",
|
||||||
"id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
|
"id_isar0", "id_isar1", "id_isar2", "id_isar3", "id_isar4", "id_isar5",
|
||||||
"aidr", "actlr",
|
"aidr", "actlr",
|
||||||
"dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
|
"dfsr", "ifsr", "adfsr", "aifsr", "dfar", "ifar",
|
||||||
"drbar", "irbar", "drsr", "irsr", "dracr", "iracr",
|
"irbar", "irsr", "iracr",
|
||||||
"dcimvac", "dcisw", "mccsw",
|
"dcimvac", "dcisw", "mccsw",
|
||||||
"dccmvau",
|
"dccmvau",
|
||||||
"nop", "raz"
|
"nop", "raz"
|
||||||
|
|
Loading…
Reference in a new issue