arm: armv8 boot options to enable v8

Modifies FSConfig.py to enable ARMv8 compatibility.
To boot gem5 with ARMv8:
   Download the v8 kernel, .dtb file, and root FS from: http://gem5.org/Download
   Download the ARMv8 toolchain, and add the bin dir to your path:
       http://www.linaro.org/engineering/engineering-projects/armv8
   Build gem5 for ARM
   Build the v8 bootloader (in gem5/system/arm/aarch64_bootloader)
   Make script in gem5/system/arm/aarch64_bootloader will require v8 toolchain,
   drop the produced boot_emm.arm64 in $(M5_PATH)/binaries/
Run:
   $ build/ARM/gem5.fast configs/example/fs.py --machine-type=VExpress_EMM64 \
     --kernel=/path/to/kernel/vmlinux-linaro-tracking \
     --dtb-filename=/path/to/dtb/rtsm_ve-aemv8a.dtb \
     --disk-image=/path/to/img/linaro-minimal-armv8.img
This commit is contained in:
Anthony Gutierrez 2014-02-18 17:20:56 -05:00
parent 4b81585c49
commit 6b765ba8b7

View file

@ -251,11 +251,14 @@ def makeArmSystem(mem_mode, machine_type, mdesc = None,
self.cf0 = CowIdeDisk(driveID='master')
self.cf0.childImage(mdesc.disk())
# default to an IDE controller rather than a CF one
# assuming we've got one
# assuming we've got one; EMM64 is an exception for the moment
if machine_type != "VExpress_EMM64":
try:
self.realview.ide.disks = [self.cf0]
except:
self.realview.cf_ctrl.disks = [self.cf0]
else:
self.realview.cf_ctrl.disks = [self.cf0]
if bare_metal:
# EOT character on UART will end the simulation
@ -273,8 +276,11 @@ def makeArmSystem(mem_mode, machine_type, mdesc = None,
print " another platform"
sys.exit(1)
boot_flags = 'earlyprintk console=ttyAMA0 lpj=19988480 norandmaps ' + \
'rw loglevel=8 mem=%s root=/dev/sda1' % mdesc.mem()
# Ensure that writes to the UART actually go out early in the boot
boot_flags = 'earlyprintk=pl011,0x1c090000 console=ttyAMA0 ' + \
'lpj=19988480 norandmaps rw loglevel=8 ' + \
'mem=%s root=/dev/sda1' % mdesc.mem()
self.mem_ranges = [AddrRange(self.realview.mem_start_addr,
size = mdesc.mem())]
self.realview.setupBootLoader(self.membus, self, binary)