From 683d6d46f6da1e0e0f377a5be1a14f7b6b4233a4 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 2 Oct 2007 22:06:59 -0700 Subject: [PATCH] X86: Fix up the microcode for the FST and FSTP instructions. --HG-- extra : convert_revision : ad68633e9b7eab425593acb20cf242bf98c2b642 --- .../load_or_store_floating_point.py | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py index 37574da34..6d56ac3bd 100644 --- a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py +++ b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/load_or_store_floating_point.py @@ -66,23 +66,21 @@ def macroop FLD_P { }; def macroop FST_M { - movfp st(0), ufp1 - stfp ufp1, seg, sib, disp + stfp st(0), seg, sib, disp }; def macroop FST_P { - movfp st(0), ufp1 rdip t7 - stfp ufp1, seg, riprel, disp + stfp st(0), seg, riprel, disp }; def macroop FSTP_M { - movfp st(0), ufp1, spm=1 + movfp ufp1, st(0), spm=1 stfp ufp1, seg, sib, disp }; def macroop FSTP_P { - movfp st(0), ufp1, spm=1 + movfp ufp1, st(0), spm=1 rdip t7 stfp ufp1, seg, riprel, disp };