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X86: Make rdcr use merge and the mov to control register instructions use the right operand size.

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This commit is contained in:
Gabe Black 2009-02-25 10:21:08 -08:00
parent 9842f1ca9d
commit 68300cfb8c
2 changed files with 3 additions and 1 deletions
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2
src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
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@ -192,10 +192,12 @@ def macroop MOVZX_W_R_P {
}; };
def macroop MOV_C_R { def macroop MOV_C_R {
.adjust_env maxOsz
wrcr reg, regm wrcr reg, regm
}; };
def macroop MOV_R_C { def macroop MOV_R_C {
.adjust_env maxOsz
rdcr reg, regm rdcr reg, regm
}; };

2
src/arch/x86/isa/microops/regop.isa
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@ -967,7 +967,7 @@ let {{
if (src1 == 1 || (src1 > 4 && src1 < 8) || (src1 > 8)) { if (src1 == 1 || (src1 > 4 && src1 < 8) || (src1 > 8)) {
fault = new InvalidOpcode(); fault = new InvalidOpcode();
} else { } else {
DestReg = ControlSrc1; DestReg = merge(DestReg, ControlSrc1, dataSize);
} }
''' '''