sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

X86: Make rdcr use merge and the mov to control register instructions use the right operand size.

Browse source
This commit is contained in:
Gabe Black 2009-02-25 10:21:08 -08:00
parent 9842f1ca9d
commit 68300cfb8c
2 changed files with 3 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/arch/x86/isa/insts/general_purpose/data_transfer/move.py
View file

@ -192,10 +192,12 @@ def macroop MOVZX_W_R_P {
};
def macroop MOV_C_R {
.adjust_env maxOsz
wrcr reg, regm
};
def macroop MOV_R_C {
.adjust_env maxOsz
rdcr reg, regm
};

2
src/arch/x86/isa/microops/regop.isa
View file

@ -967,7 +967,7 @@ let {{
if (src1 == 1 || (src1 > 4 && src1 < 8) || (src1 > 8)) {
fault = new InvalidOpcode();
} else {
DestReg = ControlSrc1;
DestReg = merge(DestReg, ControlSrc1, dataSize);
}
'''