Prefetcher: Fix some memory leaks with the prefetcher.

src/mem/cache/cache_impl.hh

@@ -1443,6 +1443,10 @@ Cache<TagStore>::getNextMSHR()
                 mshr_misses[pkt->cmdToIndex()][0/*pkt->req->threadId()*/]++;
                 // Don't request bus, since we already have it
                 return allocateMissBuffer(pkt, curTick(), false);
+            } else {
+                // free the request and packet
+                delete pkt->req;
+                delete pkt;
             }
         }
     }

src/mem/cache/prefetch/base.cc

@@ -139,25 +139,25 @@ BasePrefetcher::getPacket()
     }
 
     PacketPtr pkt;
-    bool keep_trying = false;
-    do {
+    while (!pf.empty()) {
         pkt = *pf.begin();
         pf.pop_front();
 
-        if (keep_trying) {
-            DPRINTF(HWPrefetch, "addr 0x%x in cache, skipping\n",
-                    pkt->getAddr());
-            delete pkt->req;
-            delete pkt;
-        }
+        Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1);
+
+        if (!inCache(blk_addr) && !inMissQueue(blk_addr))
+            // we found a prefetch, return it
+            break;
+
+        DPRINTF(HWPrefetch, "addr 0x%x in cache, skipping\n", pkt->getAddr());
+        delete pkt->req;
+        delete pkt;
 
         if (pf.empty()) {
             cache->deassertMemSideBusRequest(BaseCache::Request_PF);
-            if (keep_trying) {
-                return NULL; // None left, all were in cache
-            }
+            return NULL; // None left, all were in cache
         }
-    } while (keep_trying);
+    }
 
     pfIssued++;
     assert(pkt != NULL);

src/mem/cache/prefetch/stride.cc

@@ -118,6 +118,9 @@ StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
                 }
             }
             DPRINTF(HWPrefetch, "  replacing PC %x\n", (*min_pos)->instAddr);
+
+            // free entry and delete it
+            delete *min_pos;
             tab.erase(min_pos);
         }