arm, kvm: Override the kernel's default MPIDR value
The kernel and gem5 derive MPIDR values from CPU IDs in slightly different ways. This means that guests running in a multi-CPU setup sometimes fail to bring up secondary CPUs. Fix this by overriding the MPIDR value in virtual CPUs just after they have been instantiated. Change-Id: I916d44978a9c855ab89c80a083af45b0cea6edac Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2461 Reviewed-by: Weiping Liao <weipingliao@google.com>
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015 ARM Limited
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* Copyright (c) 2015, 2017 ARM Limited
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* All rights reserved
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* All rights reserved
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*
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*
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* The license below extends only to copyright in the software and shall
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* The license below extends only to copyright in the software and shall
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@ -65,6 +65,8 @@ static_assert(NUM_QREGS == 32, "Unexpected number of aarch64 vector regs.");
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#define INT_REG(name) CORE_REG(name, U64)
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#define INT_REG(name) CORE_REG(name, U64)
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#define SIMD_REG(name) CORE_REG(name, U128)
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#define SIMD_REG(name) CORE_REG(name, U128)
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#define SYS_MPIDR_EL1 ARM64_SYS_REG(0b11, 0b000, 0b0000, 0b0000, 0b101)
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constexpr uint64_t
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constexpr uint64_t
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kvmXReg(const int num)
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kvmXReg(const int num)
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{
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{
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@ -112,6 +114,10 @@ const std::vector<ArmV8KvmCPU::MiscRegInfo> ArmV8KvmCPU::miscRegMap = {
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MiscRegInfo(INT_REG(fp_regs.fpcr), MISCREG_FPCR, "FPCR"),
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MiscRegInfo(INT_REG(fp_regs.fpcr), MISCREG_FPCR, "FPCR"),
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};
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};
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const std::vector<ArmV8KvmCPU::MiscRegInfo> ArmV8KvmCPU::miscRegIdMap = {
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MiscRegInfo(SYS_MPIDR_EL1, MISCREG_MPIDR_EL1, "MPIDR(EL1)"),
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};
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ArmV8KvmCPU::ArmV8KvmCPU(ArmV8KvmCPUParams *params)
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ArmV8KvmCPU::ArmV8KvmCPU(ArmV8KvmCPUParams *params)
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: BaseArmKvmCPU(params)
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: BaseArmKvmCPU(params)
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{
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{
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@ -121,6 +127,19 @@ ArmV8KvmCPU::~ArmV8KvmCPU()
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{
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{
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}
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}
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void
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ArmV8KvmCPU::startup()
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{
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BaseArmKvmCPU::startup();
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// Override ID registers that KVM should "inherit" from gem5.
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for (const auto &ri : miscRegIdMap) {
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const uint64_t value(tc->readMiscReg(ri.idx));
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DPRINTF(KvmContext, " %s := 0x%x\n", ri.name, value);
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setOneReg(ri.kvm, value);
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}
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}
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void
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void
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ArmV8KvmCPU::dump() const
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ArmV8KvmCPU::dump() const
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{
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{
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@ -140,6 +159,9 @@ ArmV8KvmCPU::dump() const
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for (const auto &ri : miscRegMap)
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for (const auto &ri : miscRegMap)
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inform(" %s: %s\n", ri.name, getAndFormatOneReg(ri.kvm));
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inform(" %s: %s\n", ri.name, getAndFormatOneReg(ri.kvm));
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for (const auto &ri : miscRegIdMap)
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inform(" %s: %s\n", ri.name, getAndFormatOneReg(ri.kvm));
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for (const auto ® : getRegList()) {
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for (const auto ® : getRegList()) {
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const uint64_t arch(reg & KVM_REG_ARCH_MASK);
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const uint64_t arch(reg & KVM_REG_ARCH_MASK);
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if (arch != KVM_REG_ARM64) {
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if (arch != KVM_REG_ARM64) {
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015 ARM Limited
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* Copyright (c) 2015, 2017 ARM Limited
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* All rights reserved
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* All rights reserved
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*
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*
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* The license below extends only to copyright in the software and shall
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* The license below extends only to copyright in the software and shall
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@ -83,6 +83,8 @@ class ArmV8KvmCPU : public BaseArmKvmCPU
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ArmV8KvmCPU(ArmV8KvmCPUParams *params);
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ArmV8KvmCPU(ArmV8KvmCPUParams *params);
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virtual ~ArmV8KvmCPU();
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virtual ~ArmV8KvmCPU();
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void startup() override;
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void dump() const override;
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void dump() const override;
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protected:
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protected:
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@ -132,6 +134,8 @@ class ArmV8KvmCPU : public BaseArmKvmCPU
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static const std::vector<ArmV8KvmCPU::IntRegInfo> intRegMap;
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static const std::vector<ArmV8KvmCPU::IntRegInfo> intRegMap;
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/** Mapping between gem5 misc registers registers and registers in kvm */
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/** Mapping between gem5 misc registers registers and registers in kvm */
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static const std::vector<ArmV8KvmCPU::MiscRegInfo> miscRegMap;
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static const std::vector<ArmV8KvmCPU::MiscRegInfo> miscRegMap;
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/** Mapping between gem5 ID misc registers registers and registers in kvm */
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static const std::vector<ArmV8KvmCPU::MiscRegInfo> miscRegIdMap;
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/** Cached mapping between system registers in kvm and misc regs in gem5 */
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/** Cached mapping between system registers in kvm and misc regs in gem5 */
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mutable std::vector<ArmV8KvmCPU::MiscRegInfo> sysRegMap;
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mutable std::vector<ArmV8KvmCPU::MiscRegInfo> sysRegMap;
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