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ruby: Fix MESI consistency bug

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Fixes missed forward eviction to CPU. With the O3CPU this can lead to load-load
reordering, as the LQ is never notified of the invalidate.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
This commit is contained in:
Marco Elver 2015-06-07 14:02:40 -05:00
parent 25fe4c2529
commit 6599dd87c8
1 changed files with 1 additions and 0 deletions
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src/mem/protocol/MESI_Two_Level-L1cache.sm
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@ -1341,6 +1341,7 @@ machine(L1Cache, "MESI Directory L1 Cache CMP")
// transitions from SM // transitions from SM
transition(SM, Inv, IM) { transition(SM, Inv, IM) {
forward_eviction_to_cpu;
fi_sendInvAck; fi_sendInvAck;
dg_invalidate_sc; dg_invalidate_sc;
l_popRequestQueue; l_popRequestQueue;