sim: Move CPU-specific methods from SimObject to the BaseCPU class
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5f32eceeda
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6 changed files with 36 additions and 47 deletions
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@ -77,6 +77,22 @@ class BaseCPU(MemObject):
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type = 'BaseCPU'
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type = 'BaseCPU'
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abstract = True
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abstract = True
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@classmethod
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def export_method_cxx_predecls(cls, code):
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code('#include "cpu/base.hh"')
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@classmethod
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def export_methods(cls, code):
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code('''
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void switchOut();
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void takeOverFrom(BaseCPU *cpu);
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''')
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def takeOverFrom(self, old_cpu):
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self._ccObject.takeOverFrom(old_cpu._ccObject)
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system = Param.System(Parent.any, "system object")
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system = Param.System(Parent.any, "system object")
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cpu_id = Param.Int(-1, "CPU identifier")
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cpu_id = Param.Int(-1, "CPU identifier")
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numThreads = Param.Unsigned(1, "number of HW thread contexts")
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numThreads = Param.Unsigned(1, "number of HW thread contexts")
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@ -278,13 +278,27 @@ class BaseCPU : public MemObject
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void registerThreadContexts();
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void registerThreadContexts();
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/// Prepare for another CPU to take over execution. When it is
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/**
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/// is ready (drained pipe) it signals the sampler.
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* Prepare for another CPU to take over execution.
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*
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* When this method exits, all internal state should have been
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* flushed. After the method returns, the simulator calls
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* takeOverFrom() on the new CPU with this CPU as its parameter.
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*/
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virtual void switchOut();
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virtual void switchOut();
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/// Take over execution from the given CPU. Used for warm-up and
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/**
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/// sampling.
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* Load the state of a CPU from the previous CPU object, invoked
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virtual void takeOverFrom(BaseCPU *);
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* on all new CPUs that are about to be switched in.
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*
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* A CPU model implementing this method is expected to initialize
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* its state from the old CPU and connect its memory (unless they
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* are already connected) to the memories connected to the old
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* CPU.
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*
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* @param cpu CPU to initialize read state from.
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*/
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virtual void takeOverFrom(BaseCPU *cpu);
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/**
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/**
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* Number of threads we're actually simulating (<= SMT_MAX_THREADS).
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* Number of threads we're actually simulating (<= SMT_MAX_THREADS).
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@ -602,8 +602,6 @@ class SimObject(object):
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unsigned int drain(Event *drain_event);
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unsigned int drain(Event *drain_event);
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void resume();
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void resume();
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void switchOut();
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void takeOverFrom(BaseCPU *cpu);
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''')
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''')
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# Initialize new instance. For objects with SimObject-valued
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# Initialize new instance. For objects with SimObject-valued
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@ -1050,9 +1048,6 @@ class SimObject(object):
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for portRef in self._port_refs.itervalues():
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for portRef in self._port_refs.itervalues():
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portRef.ccConnect()
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portRef.ccConnect()
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def takeOverFrom(self, old_cpu):
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self._ccObject.takeOverFrom(old_cpu._ccObject)
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# Function to provide to C++ so it can look up instances based on paths
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# Function to provide to C++ so it can look up instances based on paths
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def resolveSimObject(name):
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def resolveSimObject(name):
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obj = instanceDict[name]
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obj = instanceDict[name]
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@ -221,7 +221,7 @@ def switchCpus(cpuList):
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# Now all of the CPUs are ready to be switched out
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# Now all of the CPUs are ready to be switched out
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for old_cpu, new_cpu in cpuList:
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for old_cpu, new_cpu in cpuList:
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old_cpu._ccObject.switchOut()
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old_cpu.switchOut()
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for old_cpu, new_cpu in cpuList:
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for old_cpu, new_cpu in cpuList:
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new_cpu.takeOverFrom(old_cpu)
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new_cpu.takeOverFrom(old_cpu)
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@ -163,19 +163,6 @@ SimObject::resume()
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state = Running;
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state = Running;
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}
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}
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void
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SimObject::switchOut()
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{
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panic("Unimplemented!");
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}
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void
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SimObject::takeOverFrom(BaseCPU *cpu)
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{
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panic("Unimplemented!");
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}
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SimObject *
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SimObject *
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SimObject::find(const char *name)
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SimObject::find(const char *name)
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{
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{
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@ -255,29 +255,6 @@ class SimObject : public EventManager, public Serializable
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*/
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*/
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virtual void resume();
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virtual void resume();
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/**
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* Prepare a CPU model to be switched out, invoked on active CPUs
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* that are about to be replaced.
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*
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* @note This should only be implemented in CPU models.
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*/
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virtual void switchOut();
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/**
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* Load the state of a CPU from the previous CPU object, invoked
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* on all new CPUs that are about to be switched in.
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*
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* A CPU model implementing this method is expected to initialize
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* its state from the old CPU and connect its memory (unless they
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* are already connected) to the memories connected to the old
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* CPU.
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*
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* @note This should only be implemented in CPU models.
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*
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* @param cpu CPU to initialize read state from.
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*/
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virtual void takeOverFrom(BaseCPU *cpu);
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#ifdef DEBUG
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#ifdef DEBUG
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public:
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public:
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bool doDebugBreak;
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bool doDebugBreak;
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