sim: Move CPU-specific methods from SimObject to the BaseCPU class

This commit is contained in:
Andreas Sandberg 2012-09-25 11:49:40 -05:00
parent 5f32eceeda
commit 6598241f2c
6 changed files with 36 additions and 47 deletions

View file

@ -77,6 +77,22 @@ class BaseCPU(MemObject):
type = 'BaseCPU'
abstract = True
@classmethod
def export_method_cxx_predecls(cls, code):
code('#include "cpu/base.hh"')
@classmethod
def export_methods(cls, code):
code('''
void switchOut();
void takeOverFrom(BaseCPU *cpu);
''')
def takeOverFrom(self, old_cpu):
self._ccObject.takeOverFrom(old_cpu._ccObject)
system = Param.System(Parent.any, "system object")
cpu_id = Param.Int(-1, "CPU identifier")
numThreads = Param.Unsigned(1, "number of HW thread contexts")

View file

@ -278,13 +278,27 @@ class BaseCPU : public MemObject
void registerThreadContexts();
/// Prepare for another CPU to take over execution. When it is
/// is ready (drained pipe) it signals the sampler.
/**
* Prepare for another CPU to take over execution.
*
* When this method exits, all internal state should have been
* flushed. After the method returns, the simulator calls
* takeOverFrom() on the new CPU with this CPU as its parameter.
*/
virtual void switchOut();
/// Take over execution from the given CPU. Used for warm-up and
/// sampling.
virtual void takeOverFrom(BaseCPU *);
/**
* Load the state of a CPU from the previous CPU object, invoked
* on all new CPUs that are about to be switched in.
*
* A CPU model implementing this method is expected to initialize
* its state from the old CPU and connect its memory (unless they
* are already connected) to the memories connected to the old
* CPU.
*
* @param cpu CPU to initialize read state from.
*/
virtual void takeOverFrom(BaseCPU *cpu);
/**
* Number of threads we're actually simulating (<= SMT_MAX_THREADS).

View file

@ -602,8 +602,6 @@ class SimObject(object):
unsigned int drain(Event *drain_event);
void resume();
void switchOut();
void takeOverFrom(BaseCPU *cpu);
''')
# Initialize new instance. For objects with SimObject-valued
@ -1050,9 +1048,6 @@ class SimObject(object):
for portRef in self._port_refs.itervalues():
portRef.ccConnect()
def takeOverFrom(self, old_cpu):
self._ccObject.takeOverFrom(old_cpu._ccObject)
# Function to provide to C++ so it can look up instances based on paths
def resolveSimObject(name):
obj = instanceDict[name]

View file

@ -221,7 +221,7 @@ def switchCpus(cpuList):
# Now all of the CPUs are ready to be switched out
for old_cpu, new_cpu in cpuList:
old_cpu._ccObject.switchOut()
old_cpu.switchOut()
for old_cpu, new_cpu in cpuList:
new_cpu.takeOverFrom(old_cpu)

View file

@ -163,19 +163,6 @@ SimObject::resume()
state = Running;
}
void
SimObject::switchOut()
{
panic("Unimplemented!");
}
void
SimObject::takeOverFrom(BaseCPU *cpu)
{
panic("Unimplemented!");
}
SimObject *
SimObject::find(const char *name)
{

View file

@ -255,29 +255,6 @@ class SimObject : public EventManager, public Serializable
*/
virtual void resume();
/**
* Prepare a CPU model to be switched out, invoked on active CPUs
* that are about to be replaced.
*
* @note This should only be implemented in CPU models.
*/
virtual void switchOut();
/**
* Load the state of a CPU from the previous CPU object, invoked
* on all new CPUs that are about to be switched in.
*
* A CPU model implementing this method is expected to initialize
* its state from the old CPU and connect its memory (unless they
* are already connected) to the memories connected to the old
* CPU.
*
* @note This should only be implemented in CPU models.
*
* @param cpu CPU to initialize read state from.
*/
virtual void takeOverFrom(BaseCPU *cpu);
#ifdef DEBUG
public:
bool doDebugBreak;