SPARC: Keep a copy of the current ASI in the decoder.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
This commit is contained in:
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a83e74b37a
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@ -49,9 +49,10 @@ class Decoder
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// The extended machine instruction being generated
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// The extended machine instruction being generated
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ExtMachInst emi;
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ExtMachInst emi;
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bool instDone;
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bool instDone;
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MiscReg asi;
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public:
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public:
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Decoder(ThreadContext * _tc) : tc(_tc), instDone(false)
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Decoder(ThreadContext * _tc) : tc(_tc), instDone(false), asi(0)
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{}
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{}
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ThreadContext *
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ThreadContext *
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@ -86,8 +87,7 @@ class Decoder
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// into all the execute functions
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// into all the execute functions
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if (inst & (1 << 13)) {
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if (inst & (1 << 13)) {
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emi |= (static_cast<ExtMachInst>(
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emi |= (static_cast<ExtMachInst>(
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tc->readMiscRegNoEffect(MISCREG_ASI))
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asi << (sizeof(MachInst) * 8)));
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<< (sizeof(MachInst) * 8));
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} else {
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} else {
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emi |= (static_cast<ExtMachInst>(bits(inst, 12, 5))
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emi |= (static_cast<ExtMachInst>(bits(inst, 12, 5))
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<< (sizeof(MachInst) * 8));
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<< (sizeof(MachInst) * 8));
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@ -107,6 +107,12 @@ class Decoder
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return instDone;
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return instDone;
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}
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}
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void
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setContext(MiscReg _asi)
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{
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asi = _asi;
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}
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protected:
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protected:
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/// A cache of decoded instruction objects.
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/// A cache of decoded instruction objects.
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static GenericISA::BasicDecodeCache defaultCache;
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static GenericISA::BasicDecodeCache defaultCache;
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@ -549,6 +549,9 @@ ISA::setMiscReg(int miscReg, MiscReg val, ThreadContext * tc)
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MiscReg new_val = val;
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MiscReg new_val = val;
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switch (miscReg) {
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switch (miscReg) {
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case MISCREG_ASI:
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tc->getDecodePtr()->setContext(val);
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break;
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case MISCREG_STICK:
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case MISCREG_STICK:
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case MISCREG_TICK:
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case MISCREG_TICK:
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// stick and tick are same thing on niagra
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// stick and tick are same thing on niagra
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@ -145,7 +145,7 @@ SparcLiveProcess::initState()
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// Set the trap level to 0
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// Set the trap level to 0
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tc->setMiscRegNoEffect(MISCREG_TL, 0);
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tc->setMiscRegNoEffect(MISCREG_TL, 0);
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// Set the ASI register to something fixed
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// Set the ASI register to something fixed
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tc->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY);
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tc->setMiscReg(MISCREG_ASI, ASI_PRIMARY);
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/*
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/*
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* T1 specific registers
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* T1 specific registers
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@ -94,7 +94,7 @@ copyMiscRegs(ThreadContext *src, ThreadContext *dest)
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// src->readMiscRegNoEffect(MISCREG_Y));
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// src->readMiscRegNoEffect(MISCREG_Y));
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// dest->setMiscRegNoEffect(MISCREG_CCR,
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// dest->setMiscRegNoEffect(MISCREG_CCR,
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// src->readMiscRegNoEffect(MISCREG_CCR));
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// src->readMiscRegNoEffect(MISCREG_CCR));
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dest->setMiscRegNoEffect(MISCREG_ASI,
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dest->setMiscReg(MISCREG_ASI,
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src->readMiscRegNoEffect(MISCREG_ASI));
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src->readMiscRegNoEffect(MISCREG_ASI));
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dest->setMiscRegNoEffect(MISCREG_TICK,
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dest->setMiscRegNoEffect(MISCREG_TICK,
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src->readMiscRegNoEffect(MISCREG_TICK));
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src->readMiscRegNoEffect(MISCREG_TICK));
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@ -810,7 +810,7 @@ cloneFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
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ctc->setMiscReg(MISCREG_CWP, 0);
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ctc->setMiscReg(MISCREG_CWP, 0);
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ctc->setIntReg(NumIntArchRegs + 7, 0);
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ctc->setIntReg(NumIntArchRegs + 7, 0);
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ctc->setMiscRegNoEffect(MISCREG_TL, 0);
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ctc->setMiscRegNoEffect(MISCREG_TL, 0);
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ctc->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY);
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ctc->setMiscReg(MISCREG_ASI, ASI_PRIMARY);
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for (int y = 8; y < 32; y++)
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for (int y = 8; y < 32; y++)
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ctc->setIntReg(y, tc->readIntReg(y));
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ctc->setIntReg(y, tc->readIntReg(y));
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