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O3: Get rid of the raw ExtMachInst constructor on DynInsts.

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This constructor assumes that the ExtMachInst can be decoded directly into a
StaticInst that's useful to execute. With the advent of microcoded
instructions that's no longer true.
This commit is contained in:
Gabe Black 2011-08-02 11:51:16 -07:00
parent 1c68c32cc9
commit 6230668f5e
5 changed files with 0 additions and 47 deletions
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10
src/cpu/base_dyn_inst.hh
View file

@ -380,16 +380,6 @@ class BaseDynInst : public FastAlloc, public RefCounted
BaseDynInst(StaticInstPtr staticInst, TheISA::PCState pc,
TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
/** BaseDynInst constructor given a binary instruction.
* @param inst The binary instruction.
* @param _pc The PC state for the instruction.
* @param _predPC The predicted next PC state for the instruction.
* @param seq_num The sequence number of the instruction.
* @param cpu Pointer to the instruction's CPU.
*/
BaseDynInst(TheISA::ExtMachInst inst, TheISA::PCState pc,
TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
/** BaseDynInst constructor given a StaticInst pointer.
* @param _staticInst The StaticInst for this BaseDynInst.
*/

15
src/cpu/base_dyn_inst_impl.hh
View file

@ -89,21 +89,6 @@ BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
initVars();
}
template <class Impl>
BaseDynInst<Impl>::BaseDynInst(TheISA::ExtMachInst inst,
TheISA::PCState _pc, TheISA::PCState _predPC,
InstSeqNum seq_num, ImplCPU *cpu)
: staticInst(inst, _pc.instAddr()), traceData(NULL), cpu(cpu)
{
seqNum = seq_num;
pc = _pc;
predPC = _predPC;
predTaken = false;
initVars();
}
template <class Impl>
BaseDynInst<Impl>::BaseDynInst(StaticInstPtr &_staticInst)
: staticInst(_staticInst), traceData(NULL)

5
src/cpu/o3/dyn_inst.hh
View file

@ -90,11 +90,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
TheISA::PCState pc, TheISA::PCState predPC,
InstSeqNum seq_num, O3CPU *cpu);
/** BaseDynInst constructor given a binary instruction. */
BaseO3DynInst(ExtMachInst inst,
TheISA::PCState pc, TheISA::PCState predPC,
InstSeqNum seq_num, O3CPU *cpu);
/** BaseDynInst constructor given a static inst pointer. */
BaseO3DynInst(StaticInstPtr &_staticInst);

9
src/cpu/o3/dyn_inst_impl.hh
View file

@ -52,15 +52,6 @@ BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
initVars();
}
template <class Impl>
BaseO3DynInst<Impl>::BaseO3DynInst(ExtMachInst inst,
TheISA::PCState pc, TheISA::PCState predPC,
InstSeqNum seq_num, O3CPU *cpu)
: BaseDynInst<Impl>(inst, pc, predPC, seq_num, cpu)
{
initVars();
}
template <class Impl>
BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr &_staticInst)
: BaseDynInst<Impl>(_staticInst)

8
src/cpu/ozone/dyn_inst_impl.hh
View file

@ -46,14 +46,6 @@ OzoneDynInst<Impl>::OzoneDynInst(OzoneCPU *cpu)
initInstPtrs();
}
template <class Impl>
OzoneDynInst<Impl>::OzoneDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
InstSeqNum seq_num, OzoneCPU *cpu)
: BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
{
initInstPtrs();
}
template <class Impl>
OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
: BaseDynInst<Impl>(_staticInst)