O3: Get rid of the raw ExtMachInst constructor on DynInsts.
This constructor assumes that the ExtMachInst can be decoded directly into a StaticInst that's useful to execute. With the advent of microcoded instructions that's no longer true.
This commit is contained in:
parent
1c68c32cc9
commit
6230668f5e
5 changed files with 0 additions and 47 deletions
|
@ -380,16 +380,6 @@ class BaseDynInst : public FastAlloc, public RefCounted
|
||||||
BaseDynInst(StaticInstPtr staticInst, TheISA::PCState pc,
|
BaseDynInst(StaticInstPtr staticInst, TheISA::PCState pc,
|
||||||
TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
|
TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
|
||||||
|
|
||||||
/** BaseDynInst constructor given a binary instruction.
|
|
||||||
* @param inst The binary instruction.
|
|
||||||
* @param _pc The PC state for the instruction.
|
|
||||||
* @param _predPC The predicted next PC state for the instruction.
|
|
||||||
* @param seq_num The sequence number of the instruction.
|
|
||||||
* @param cpu Pointer to the instruction's CPU.
|
|
||||||
*/
|
|
||||||
BaseDynInst(TheISA::ExtMachInst inst, TheISA::PCState pc,
|
|
||||||
TheISA::PCState predPC, InstSeqNum seq_num, ImplCPU *cpu);
|
|
||||||
|
|
||||||
/** BaseDynInst constructor given a StaticInst pointer.
|
/** BaseDynInst constructor given a StaticInst pointer.
|
||||||
* @param _staticInst The StaticInst for this BaseDynInst.
|
* @param _staticInst The StaticInst for this BaseDynInst.
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -89,21 +89,6 @@ BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
|
||||||
initVars();
|
initVars();
|
||||||
}
|
}
|
||||||
|
|
||||||
template <class Impl>
|
|
||||||
BaseDynInst<Impl>::BaseDynInst(TheISA::ExtMachInst inst,
|
|
||||||
TheISA::PCState _pc, TheISA::PCState _predPC,
|
|
||||||
InstSeqNum seq_num, ImplCPU *cpu)
|
|
||||||
: staticInst(inst, _pc.instAddr()), traceData(NULL), cpu(cpu)
|
|
||||||
{
|
|
||||||
seqNum = seq_num;
|
|
||||||
|
|
||||||
pc = _pc;
|
|
||||||
predPC = _predPC;
|
|
||||||
predTaken = false;
|
|
||||||
|
|
||||||
initVars();
|
|
||||||
}
|
|
||||||
|
|
||||||
template <class Impl>
|
template <class Impl>
|
||||||
BaseDynInst<Impl>::BaseDynInst(StaticInstPtr &_staticInst)
|
BaseDynInst<Impl>::BaseDynInst(StaticInstPtr &_staticInst)
|
||||||
: staticInst(_staticInst), traceData(NULL)
|
: staticInst(_staticInst), traceData(NULL)
|
||||||
|
|
|
@ -90,11 +90,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
|
||||||
TheISA::PCState pc, TheISA::PCState predPC,
|
TheISA::PCState pc, TheISA::PCState predPC,
|
||||||
InstSeqNum seq_num, O3CPU *cpu);
|
InstSeqNum seq_num, O3CPU *cpu);
|
||||||
|
|
||||||
/** BaseDynInst constructor given a binary instruction. */
|
|
||||||
BaseO3DynInst(ExtMachInst inst,
|
|
||||||
TheISA::PCState pc, TheISA::PCState predPC,
|
|
||||||
InstSeqNum seq_num, O3CPU *cpu);
|
|
||||||
|
|
||||||
/** BaseDynInst constructor given a static inst pointer. */
|
/** BaseDynInst constructor given a static inst pointer. */
|
||||||
BaseO3DynInst(StaticInstPtr &_staticInst);
|
BaseO3DynInst(StaticInstPtr &_staticInst);
|
||||||
|
|
||||||
|
|
|
@ -52,15 +52,6 @@ BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
|
||||||
initVars();
|
initVars();
|
||||||
}
|
}
|
||||||
|
|
||||||
template <class Impl>
|
|
||||||
BaseO3DynInst<Impl>::BaseO3DynInst(ExtMachInst inst,
|
|
||||||
TheISA::PCState pc, TheISA::PCState predPC,
|
|
||||||
InstSeqNum seq_num, O3CPU *cpu)
|
|
||||||
: BaseDynInst<Impl>(inst, pc, predPC, seq_num, cpu)
|
|
||||||
{
|
|
||||||
initVars();
|
|
||||||
}
|
|
||||||
|
|
||||||
template <class Impl>
|
template <class Impl>
|
||||||
BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr &_staticInst)
|
BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr &_staticInst)
|
||||||
: BaseDynInst<Impl>(_staticInst)
|
: BaseDynInst<Impl>(_staticInst)
|
||||||
|
|
|
@ -46,14 +46,6 @@ OzoneDynInst<Impl>::OzoneDynInst(OzoneCPU *cpu)
|
||||||
initInstPtrs();
|
initInstPtrs();
|
||||||
}
|
}
|
||||||
|
|
||||||
template <class Impl>
|
|
||||||
OzoneDynInst<Impl>::OzoneDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
|
|
||||||
InstSeqNum seq_num, OzoneCPU *cpu)
|
|
||||||
: BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
|
|
||||||
{
|
|
||||||
initInstPtrs();
|
|
||||||
}
|
|
||||||
|
|
||||||
template <class Impl>
|
template <class Impl>
|
||||||
OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
|
OzoneDynInst<Impl>::OzoneDynInst(StaticInstPtr _staticInst)
|
||||||
: BaseDynInst<Impl>(_staticInst)
|
: BaseDynInst<Impl>(_staticInst)
|
||||||
|
|
Loading…
Reference in a new issue