Make things compile in SE again.
--HG-- extra : convert_revision : cf7faf5001b31d61c61ddce2386d61c919075800
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@ -322,8 +322,8 @@ void MiscRegFile::setRegWithEffect(int miscReg,
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const MiscReg &val, ThreadContext * tc)
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const MiscReg &val, ThreadContext * tc)
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{
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{
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const uint64_t Bit64 = (1ULL << 63);
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const uint64_t Bit64 = (1ULL << 63);
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uint64_t time;
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#if FULL_SYSTEM
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#if FULL_SYSTEM
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uint64_t time;
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SparcSystem *sys;
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SparcSystem *sys;
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#endif
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#endif
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switch (miscReg) {
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switch (miscReg) {
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@ -364,6 +364,7 @@ void MiscRegFile::setRegWithEffect(int miscReg,
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case MISCREG_SOFTINT_SET:
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case MISCREG_SOFTINT_SET:
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//Do whatever this is supposed to do...
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//Do whatever this is supposed to do...
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break;
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break;
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#if FULL_SYSTEM
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case MISCREG_TICK_CMPR:
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case MISCREG_TICK_CMPR:
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if (tickCompare == NULL)
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if (tickCompare == NULL)
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tickCompare = new TickCompareEvent(this, tc);
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tickCompare = new TickCompareEvent(this, tc);
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@ -374,6 +375,7 @@ void MiscRegFile::setRegWithEffect(int miscReg,
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if (!tick_cmprFields.int_dis && time > 0)
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if (!tick_cmprFields.int_dis && time > 0)
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tickCompare->schedule(time * tc->getCpuPtr()->cycles(1));
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tickCompare->schedule(time * tc->getCpuPtr()->cycles(1));
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break;
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break;
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#endif
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case MISCREG_PIL:
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case MISCREG_PIL:
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//We need to inject interrupts, and or notify the interrupt
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//We need to inject interrupts, and or notify the interrupt
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//object that it needs to use a different interrupt level.
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//object that it needs to use a different interrupt level.
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@ -482,6 +484,7 @@ void MiscRegFile::unserialize(Checkpoint * cp, const std::string & section)
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implicitDataAsi = (ASI)temp;
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implicitDataAsi = (ASI)temp;
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}
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}
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#if FULL_SYSTEM
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void
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void
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MiscRegFile::processTickCompare(ThreadContext *tc)
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MiscRegFile::processTickCompare(ThreadContext *tc)
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{
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{
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@ -499,3 +502,4 @@ MiscRegFile::processHSTickCompare(ThreadContext *tc)
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{
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{
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panic("tick compare not implemented\n");
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panic("tick compare not implemented\n");
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}
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}
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#endif
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