Fix minor doxygen issues.

Doxyfile:
    Turn on EXTRACT_ALL so we get full class hierarchy info.
base/range.hh:
cpu/o3/fetch.hh:
cpu/o3/rename_map.hh:
cpu/o3/rob.hh:
dev/ide_disk.cc:
dev/tsunami.cc:
dev/tsunami.hh:
dev/tsunami_cchip.hh:
    Fix doxygen issues.

--HG--
extra : convert_revision : 9e0e8d3510b35db201459b8a3211c5e6ad5f0bb4
This commit is contained in:
Steve Reinhardt 2005-06-05 08:08:29 -04:00
parent ad8b9636f8
commit 5f0f42f166
9 changed files with 16 additions and 16 deletions

View file

@ -193,7 +193,7 @@ SUBGROUPING = YES
# Private class members and static file members will be hidden unless
# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
EXTRACT_ALL = NO
EXTRACT_ALL = YES
# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
# will be included in the documentation.

View file

@ -36,8 +36,10 @@
/**
* @param s range string
* EndExclusive Ranges are in the following format:
* @verbatim
* <range> := {<start_val>}:{<end>}
* <start> := <end_val> | +<delta>
* @endverbatim
*/
template <class T>
bool __parse_range(const std::string &s, T &start, T &end);

View file

@ -109,7 +109,7 @@ class SimpleFetch
/**
* Looks up in the branch predictor to see if the next PC should be
* either next PC+=MachInst or a branch target.
* @params next_PC Next PC variable passed in by reference. It is
* @param next_PC Next PC variable passed in by reference. It is
* expected to be set to the current PC; it will be updated with what
* the next PC will be.
* @return Whether or not a branch was predicted as taken.
@ -120,7 +120,7 @@ class SimpleFetch
* Fetches the cache line that contains fetch_PC. Returns any
* fault that happened. Puts the data into the class variable
* cacheData.
* @params fetch_PC The PC address that is being fetched from.
* @param fetch_PC The PC address that is being fetched from.
* @return Any fault that occured.
*/
Fault fetchCacheLine(Addr fetch_PC);

View file

@ -85,8 +85,7 @@ class SimpleRenameMap
/**
* Marks the given register as ready, meaning that its value has been
* calculated and written to the register file.
* @params ready_reg The index of the physical register that is now
* ready.
* @param ready_reg The index of the physical register that is now ready.
*/
void markAsReady(PhysRegIndex ready_reg);

View file

@ -57,15 +57,15 @@ class ROB
public:
/** ROB constructor.
* @params _numEntries Number of entries in ROB.
* @params _squashWidth Number of instructions that can be squashed in a
* @param _numEntries Number of entries in ROB.
* @param _squashWidth Number of instructions that can be squashed in a
* single cycle.
*/
ROB(unsigned _numEntries, unsigned _squashWidth);
/** Function to set the CPU pointer, necessary due to which object the ROB
* is created within.
* @params cpu_ptr Pointer to the implementation specific full CPU object.
* @param cpu_ptr Pointer to the implementation specific full CPU object.
*/
void setCPU(FullCPU *cpu_ptr);
@ -73,7 +73,7 @@ class ROB
* not truly required, but is useful for checking correctness. Note
* that whatever calls this function must ensure that there is enough
* space within the ROB for the new instruction.
* @params inst The instruction being inserted into the ROB.
* @param inst The instruction being inserted into the ROB.
* @todo Remove the parameter once correctness is ensured.
*/
void insertInst(DynInstPtr &inst);

View file

@ -351,7 +351,7 @@ IdeDisk::dmaPrdReadDone()
void
IdeDisk::doDmaRead()
{
/** @TODO we need to figure out what the delay actually will be */
/** @todo we need to figure out what the delay actually will be */
Tick totalDiskDelay = diskDelay + (curPrd.getByteCount() / SectorSize);
DPRINTF(IdeDisk, "doDmaRead, diskDelay: %d totalDiskDelay: %d\n",
@ -455,7 +455,7 @@ IdeDisk::dmaReadDone()
void
IdeDisk::doDmaWrite()
{
/** @TODO we need to figure out what the delay actually will be */
/** @todo we need to figure out what the delay actually will be */
Tick totalDiskDelay = diskDelay + (curPrd.getByteCount() / SectorSize);
DPRINTF(IdeDisk, "doDmaWrite, diskDelay: %d totalDiskDelay: %d\n",

View file

@ -26,7 +26,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @file Implementation of Tsunami platform.
/** @file
* Implementation of Tsunami platform.
*/
#include <deque>

View file

@ -84,9 +84,7 @@ class Tsunami : public Platform
/**
* Constructor for the Tsunami Class.
* @param name name of the object
* @param con pointer to the console
* @param intrcontrol pointer to the interrupt controller
* @param intrFreq frequency that interrupts happen
* @param intrctrl pointer to the interrupt controller
*/
Tsunami(const std::string &name, System *s, IntrControl *intctrl,
PciConfigAll *pci);

View file

@ -139,7 +139,7 @@ class TsunamiCChip : public PioDevice
/**
* clear a timer interrupt previously posted to the CPU.
* @param interrupt the cpu number to clear(bitvector)
* @param itintr the cpu number to clear(bitvector)
*/
void clearITI(uint64_t itintr);