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X86: Fix minor bug in the page table walker from TLB shuffling.

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This commit is contained in:
Gabe Black 2009-04-13 04:14:15 -07:00
parent c87c9950df
commit 5c79191603
1 changed files with 1 additions and 1 deletions
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src/arch/x86/pagetable_walker.cc
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@ -98,7 +98,7 @@ Walker::doNext(PacketPtr &write)
bool uncacheable = pte.pcd; bool uncacheable = pte.pcd;
Addr nextRead = 0; Addr nextRead = 0;
bool doWrite = false; bool doWrite = false;
bool badNX = pte.nx && mode == BaseTLB::Write && enableNX; bool badNX = pte.nx && mode == BaseTLB::Execute && enableNX;
switch(state) { switch(state) {
case LongPML4: case LongPML4:
DPRINTF(PageTableWalker, DPRINTF(PageTableWalker,