Registers: Eliminate the ISA defined RegFile class.
This commit is contained in:
parent
9bf22992ee
commit
5c37d10624
|
@ -57,7 +57,6 @@ enum MiscRegIndex
|
|||
class MiscRegFile
|
||||
{
|
||||
public:
|
||||
friend class RegFile;
|
||||
typedef uint64_t InternalProcReg;
|
||||
|
||||
protected:
|
||||
|
|
|
@ -52,22 +52,6 @@ const int reg_redir[NumIntRegs] = {
|
|||
/* 24 */ 24, 25, 26, 27, 28, 29, 30, 31 };
|
||||
#endif
|
||||
|
||||
void
|
||||
RegFile::serialize(EventManager *em, ostream &os)
|
||||
{
|
||||
#if FULL_SYSTEM
|
||||
SERIALIZE_SCALAR(intrflag);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
RegFile::unserialize(EventManager *em, Checkpoint *cp, const string §ion)
|
||||
{
|
||||
#if FULL_SYSTEM
|
||||
UNSERIALIZE_SCALAR(intrflag);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
copyRegs(ThreadContext *src, ThreadContext *dest)
|
||||
{
|
||||
|
|
|
@ -46,22 +46,6 @@ namespace AlphaISA {
|
|||
// redirected register map, really only used for the full system case.
|
||||
extern const int reg_redir[NumIntRegs];
|
||||
|
||||
class RegFile {
|
||||
public:
|
||||
#if FULL_SYSTEM
|
||||
int intrflag; // interrupt flag
|
||||
#endif // FULL_SYSTEM
|
||||
|
||||
void
|
||||
clear()
|
||||
{
|
||||
}
|
||||
|
||||
void serialize(EventManager *em, std::ostream &os);
|
||||
void unserialize(EventManager *em, Checkpoint *cp,
|
||||
const std::string §ion);
|
||||
};
|
||||
|
||||
void copyRegs(ThreadContext *src, ThreadContext *dest);
|
||||
|
||||
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
|
||||
|
|
|
@ -433,7 +433,6 @@ void InterruptFault::invoke(ThreadContext *tc)
|
|||
{
|
||||
#if FULL_SYSTEM
|
||||
DPRINTF(Arm,"%s encountered.\n", name());
|
||||
//RegFile *Reg = tc->getRegFilePtr(); // Get pointer to the register fil
|
||||
setExceptionState(tc,0x0A);
|
||||
Addr HandlerBase;
|
||||
|
||||
|
@ -469,7 +468,6 @@ void ReservedInstructionFault::invoke(ThreadContext *tc)
|
|||
{
|
||||
#if FULL_SYSTEM
|
||||
DPRINTF(Arm,"%s encountered.\n", name());
|
||||
//RegFile *Reg = tc->getRegFilePtr(); // Get pointer to the register fil
|
||||
setExceptionState(tc,0x0A);
|
||||
Addr HandlerBase;
|
||||
HandlerBase= vect() + tc->readMiscRegNoEffect(ArmISA::EBase); // Offset 0x180 - General Exception Vector
|
||||
|
|
|
@ -84,8 +84,6 @@ namespace ArmISA
|
|||
assert(misc_reg < NumMiscRegs);
|
||||
miscRegFile[misc_reg] = val;
|
||||
}
|
||||
|
||||
friend class RegFile;
|
||||
};
|
||||
} // namespace ArmISA
|
||||
|
||||
|
|
|
@ -93,20 +93,6 @@ namespace ArmISA
|
|||
r14_abt
|
||||
};
|
||||
|
||||
class RegFile
|
||||
{
|
||||
public:
|
||||
|
||||
void clear()
|
||||
{}
|
||||
|
||||
void serialize(EventManager *em, std::ostream &os)
|
||||
{}
|
||||
void unserialize(EventManager *em, Checkpoint *cp,
|
||||
const std::string §ion)
|
||||
{}
|
||||
};
|
||||
|
||||
void copyRegs(ThreadContext *src, ThreadContext *dest);
|
||||
|
||||
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
|
||||
|
|
|
@ -435,7 +435,6 @@ void InterruptFault::invoke(ThreadContext *tc)
|
|||
{
|
||||
#if FULL_SYSTEM
|
||||
DPRINTF(MipsPRA,"%s encountered.\n", name());
|
||||
//RegFile *Reg = tc->getRegFilePtr(); // Get pointer to the register fil
|
||||
setExceptionState(tc,0x0A);
|
||||
Addr HandlerBase;
|
||||
|
||||
|
@ -471,7 +470,6 @@ void ReservedInstructionFault::invoke(ThreadContext *tc)
|
|||
{
|
||||
#if FULL_SYSTEM
|
||||
DPRINTF(MipsPRA,"%s encountered.\n", name());
|
||||
//RegFile *Reg = tc->getRegFilePtr(); // Get pointer to the register fil
|
||||
setExceptionState(tc,0x0A);
|
||||
Addr HandlerBase;
|
||||
HandlerBase= vect() + tc->readMiscRegNoEffect(MipsISA::EBase); // Offset 0x180 - General Exception Vector
|
||||
|
|
|
@ -48,9 +48,6 @@ namespace MipsISA
|
|||
{
|
||||
class MiscRegFile {
|
||||
public:
|
||||
// Give RegFile object, private access
|
||||
friend class RegFile;
|
||||
|
||||
// The MIPS name for this file is CP0 or Coprocessor 0
|
||||
typedef MiscRegFile CP0;
|
||||
|
||||
|
|
|
@ -92,27 +92,6 @@ namespace MipsISA
|
|||
//TotalArchRegs = NumIntArchRegs * ShadowSets
|
||||
const int TotalArchRegs = NumIntArchRegs;
|
||||
|
||||
|
||||
class RegFile {
|
||||
public:
|
||||
void clear()
|
||||
{}
|
||||
void reset(std::string core_name, ThreadID num_threads,
|
||||
unsigned num_vpes, BaseCPU *_cpu)
|
||||
{}
|
||||
|
||||
void setShadowSet(int css)
|
||||
{}
|
||||
|
||||
public:
|
||||
void serialize(EventManager *em, std::ostream &os)
|
||||
{}
|
||||
void unserialize(EventManager *em, Checkpoint *cp,
|
||||
const std::string §ion)
|
||||
{}
|
||||
|
||||
};
|
||||
|
||||
} // namespace MipsISA
|
||||
|
||||
#endif
|
||||
|
|
|
@ -44,8 +44,6 @@ namespace BigEndianGuest {}
|
|||
|
||||
namespace SparcISA
|
||||
{
|
||||
class RegFile;
|
||||
|
||||
const int MachineBytes = 8;
|
||||
|
||||
//This makes sure the big endian versions of certain functions are used.
|
||||
|
|
|
@ -47,20 +47,6 @@ namespace SparcISA
|
|||
const int NumIntArchRegs = 32;
|
||||
const int NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs;
|
||||
|
||||
class RegFile
|
||||
{
|
||||
public:
|
||||
|
||||
void clear()
|
||||
{}
|
||||
|
||||
void serialize(EventManager *em, std::ostream &os)
|
||||
{}
|
||||
void unserialize(EventManager *em, Checkpoint *cp,
|
||||
const std::string §ion)
|
||||
{}
|
||||
};
|
||||
|
||||
void copyRegs(ThreadContext *src, ThreadContext *dest);
|
||||
|
||||
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
|
||||
|
|
|
@ -84,19 +84,6 @@ namespace X86ISA
|
|||
NumMMXRegs + 2 * NumXMMRegs + NumMicroFpRegs;
|
||||
const int NumFloatArchRegs = NumFloatRegs + 8;
|
||||
|
||||
class RegFile
|
||||
{
|
||||
public:
|
||||
void clear()
|
||||
{}
|
||||
|
||||
void serialize(EventManager *em, std::ostream &os)
|
||||
{}
|
||||
void unserialize(EventManager *em, Checkpoint *cp,
|
||||
const std::string §ion)
|
||||
{}
|
||||
};
|
||||
|
||||
void copyRegs(ThreadContext *src, ThreadContext *dest);
|
||||
|
||||
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
|
||||
|
|
|
@ -77,7 +77,6 @@ class InOrderCPU : public BaseCPU
|
|||
typedef TheISA::IntReg IntReg;
|
||||
typedef TheISA::FloatReg FloatReg;
|
||||
typedef TheISA::FloatRegBits FloatRegBits;
|
||||
typedef TheISA::RegFile RegFile;
|
||||
typedef TheISA::MiscReg MiscReg;
|
||||
|
||||
//DynInstPtr TypeDefs
|
||||
|
|
|
@ -110,7 +110,6 @@ SimpleThread::SimpleThread()
|
|||
#endif
|
||||
{
|
||||
tc = new ProxyThreadContext<SimpleThread>(this);
|
||||
regs.clear();
|
||||
}
|
||||
|
||||
SimpleThread::~SimpleThread()
|
||||
|
@ -191,7 +190,6 @@ void
|
|||
SimpleThread::serialize(ostream &os)
|
||||
{
|
||||
ThreadState::serialize(os);
|
||||
regs.serialize(cpu, os);
|
||||
SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
|
||||
SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
|
||||
SERIALIZE_SCALAR(microPC);
|
||||
|
@ -207,7 +205,6 @@ void
|
|||
SimpleThread::unserialize(Checkpoint *cp, const std::string §ion)
|
||||
{
|
||||
ThreadState::unserialize(cp, section);
|
||||
regs.unserialize(cpu, cp, section);
|
||||
UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
|
||||
UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
|
||||
UNSERIALIZE_SCALAR(microPC);
|
||||
|
|
|
@ -90,7 +90,6 @@ class TranslatingPort;
|
|||
class SimpleThread : public ThreadState
|
||||
{
|
||||
protected:
|
||||
typedef TheISA::RegFile RegFile;
|
||||
typedef TheISA::MachInst MachInst;
|
||||
typedef TheISA::MiscReg MiscReg;
|
||||
typedef TheISA::FloatReg FloatReg;
|
||||
|
@ -99,7 +98,6 @@ class SimpleThread : public ThreadState
|
|||
typedef ThreadContext::Status Status;
|
||||
|
||||
protected:
|
||||
RegFile regs; // correct-path register context
|
||||
union {
|
||||
FloatReg f[TheISA::NumFloatRegs];
|
||||
FloatRegBits i[TheISA::NumFloatRegs];
|
||||
|
@ -253,7 +251,6 @@ class SimpleThread : public ThreadState
|
|||
|
||||
void clearArchRegs()
|
||||
{
|
||||
regs.clear();
|
||||
microPC = 0;
|
||||
nextMicroPC = 1;
|
||||
PC = nextPC = nextNPC = 0;
|
||||
|
|
|
@ -79,7 +79,6 @@ namespace TheISA {
|
|||
class ThreadContext
|
||||
{
|
||||
protected:
|
||||
typedef TheISA::RegFile RegFile;
|
||||
typedef TheISA::MachInst MachInst;
|
||||
typedef TheISA::IntReg IntReg;
|
||||
typedef TheISA::FloatReg FloatReg;
|
||||
|
|
|
@ -496,7 +496,6 @@ class Tru64 : public OperatingSystem
|
|||
{
|
||||
using namespace TheISA;
|
||||
|
||||
using TheISA::RegFile;
|
||||
TypedBufferArg<Tru64::sigcontext> sc(process->getSyscallArg(tc, 0));
|
||||
|
||||
sc.copyIn(tc->getMemPort());
|
||||
|
|
Loading…
Reference in a new issue