ruby: convert Topology to regular class
The Topology class in Ruby does not need to inherit from SimObject class. This patch turns it into a regular class. The topology object is now created in the constructor of the Network class. All the parameters for the topology class have been moved to the network class.
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7 changed files with 49 additions and 98 deletions
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@ -142,19 +142,12 @@ def create_system(options, system, piobus = None, dma_ports = []):
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# the controllers. Hence the separation between topology definition and
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# instantiation.
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#
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# gem5 SimObject defined in src/mem/ruby/network/Network.py
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net_topology = Topology()
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net_topology.description = topology.description
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routers, int_links, ext_links = topology.makeTopology(options,
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IntLinkClass, ExtLinkClass, RouterClass)
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net_topology.num_routers = len(routers)
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net_topology.int_links = int_links
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net_topology.ext_links = ext_links
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network = NetworkClass(ruby_system = ruby, topology = net_topology,
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routers = routers)
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network = NetworkClass(ruby_system = ruby, routers = routers,
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int_links = int_links, ext_links = ext_links,
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topology = topology.description)
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if options.network_fault_model:
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assert(options.garnet_network == "fixed")
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@ -28,8 +28,8 @@
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#include "base/misc.hh"
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#include "mem/protocol/MachineType.hh"
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#include "mem/ruby/network/BasicLink.hh"
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#include "mem/ruby/network/Network.hh"
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#include "mem/ruby/network/Topology.hh"
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#include "mem/ruby/system/System.hh"
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uint32_t Network::m_virtual_networks;
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@ -40,20 +40,25 @@ Network::Network(const Params *p)
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: ClockedObject(p)
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{
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m_virtual_networks = p->number_of_virtual_networks;
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m_topology_ptr = p->topology;
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m_control_msg_size = p->control_msg_size;
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// Total nodes/controllers in network
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// Must make sure this is called after the State Machine constructors
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m_nodes = MachineType_base_number(MachineType_NUM);
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assert(m_nodes != 0);
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assert(m_virtual_networks != 0);
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assert(m_topology_ptr != NULL);
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m_topology_ptr = new Topology(p->routers.size(), p->ext_links,
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p->int_links);
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p->ruby_system->registerNetwork(this);
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// Initialize the controller's network pointers
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m_topology_ptr->initNetworkPtr(this);
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p->ruby_system->registerNetwork(this);
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for (std::vector<BasicExtLink*>::const_iterator i = p->ext_links.begin();
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i != p->ext_links.end(); ++i) {
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BasicExtLink *ext_link = (*i);
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AbstractController *abs_cntrl = ext_link->params()->ext_node;
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abs_cntrl->initNetworkPtr(this);
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}
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}
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void
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@ -44,17 +44,17 @@
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#include <string>
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#include <vector>
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#include "mem/packet.hh"
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#include "mem/protocol/LinkDirection.hh"
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#include "mem/protocol/MessageSizeType.hh"
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#include "mem/ruby/common/TypeDefines.hh"
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#include "mem/ruby/network/Topology.hh"
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#include "mem/packet.hh"
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#include "params/RubyNetwork.hh"
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#include "sim/clocked_object.hh"
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class NetDest;
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class MessageBuffer;
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class Throttle;
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class Topology;
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class Network : public ClockedObject
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{
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@ -62,6 +62,8 @@ class Network : public ClockedObject
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typedef RubyNetworkParams Params;
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Network(const Params *p);
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virtual ~Network() {}
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const Params * params() const
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{ return dynamic_cast<const Params *>(_params);}
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virtual void init();
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@ -32,22 +32,18 @@ from m5.SimObject import SimObject
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from ClockedObject import ClockedObject
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from BasicLink import BasicLink
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class Topology(SimObject):
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type = 'Topology'
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cxx_header = "mem/ruby/network/Topology.hh"
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description = Param.String("Not Specified",
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"the name of the imported topology module")
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num_routers = Param.UInt32("Number of routers in the network")
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ext_links = VectorParam.BasicExtLink("Links to external nodes")
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int_links = VectorParam.BasicIntLink("Links between internal nodes")
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class RubyNetwork(ClockedObject):
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type = 'RubyNetwork'
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cxx_class = 'Network'
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cxx_header = "mem/ruby/network/Network.hh"
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abstract = True
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number_of_virtual_networks = Param.Int(10, "");
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topology = Param.Topology("");
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control_msg_size = Param.Int(8, "");
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ruby_system = Param.RubySystem("");
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topology = Param.String("Not Specified",
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"the name of the imported topology module")
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number_of_virtual_networks = Param.Int(10, "")
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control_msg_size = Param.Int(8, "")
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ruby_system = Param.RubySystem("")
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routers = VectorParam.BasicRouter("Network routers")
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ext_links = VectorParam.BasicExtLink("Links to external nodes")
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int_links = VectorParam.BasicIntLink("Links between internal nodes")
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@ -33,7 +33,6 @@
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#include "mem/protocol/MachineType.hh"
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#include "mem/ruby/common/NetDest.hh"
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#include "mem/ruby/network/BasicLink.hh"
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#include "mem/ruby/network/Network.hh"
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#include "mem/ruby/network/Topology.hh"
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#include "mem/ruby/slicc_interface/AbstractController.hh"
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@ -58,10 +57,10 @@ bool link_is_shortest_path_to_node(SwitchID src, SwitchID next,
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NetDest shortest_path_to_node(SwitchID src, SwitchID next,
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const Matrix& weights, const Matrix& dist);
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Topology::Topology(const Params *p)
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: SimObject(p)
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Topology::Topology(uint32_t num_routers, vector<BasicExtLink *> ext_links,
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vector<BasicIntLink *> int_links)
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: m_number_of_switches(num_routers)
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{
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m_number_of_switches = p->num_routers;
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// initialize component latencies record
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m_component_latencies.resize(0);
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@ -72,18 +71,17 @@ Topology::Topology(const Params *p)
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m_nodes = MachineType_base_number(MachineType_NUM);
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assert(m_nodes > 1);
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if (m_nodes != params()->ext_links.size() &&
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m_nodes != params()->ext_links.size()) {
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if (m_nodes != ext_links.size()) {
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fatal("m_nodes (%d) != ext_links vector length (%d)\n",
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m_nodes, params()->ext_links.size());
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m_nodes, ext_links.size());
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}
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// analyze both the internal and external links, create data structures
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// Note that the python created links are bi-directional, but that the
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// topology and networks utilize uni-directional links. Thus each
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// BasicLink is converted to two calls to add link, on for each direction
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for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
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i != params()->ext_links.end(); ++i) {
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for (vector<BasicExtLink*>::const_iterator i = ext_links.begin();
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i != ext_links.end(); ++i) {
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BasicExtLink *ext_link = (*i);
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AbstractController *abs_cntrl = ext_link->params()->ext_node;
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BasicRouter *router = ext_link->params()->int_node;
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@ -102,8 +100,8 @@ Topology::Topology(const Params *p)
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addLink(int_idx, ext_idx2, ext_link, LinkDirection_Out);
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}
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for (vector<BasicIntLink*>::const_iterator i = params()->int_links.begin();
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i != params()->int_links.end(); ++i) {
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for (vector<BasicIntLink*>::const_iterator i = int_links.begin();
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i != int_links.end(); ++i) {
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BasicIntLink *int_link = (*i);
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BasicRouter *router_a = int_link->params()->node_a;
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BasicRouter *router_b = int_link->params()->node_b;
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@ -122,23 +120,6 @@ Topology::Topology(const Params *p)
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}
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}
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void
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Topology::init()
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{
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}
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void
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Topology::initNetworkPtr(Network* net_ptr)
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{
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for (vector<BasicExtLink*>::const_iterator i = params()->ext_links.begin();
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i != params()->ext_links.end(); ++i) {
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BasicExtLink *ext_link = (*i);
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AbstractController *abs_cntrl = ext_link->params()->ext_node;
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abs_cntrl->initNetworkPtr(net_ptr);
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}
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}
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void
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Topology::createLinks(Network *net, bool isReconfiguration)
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{
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@ -354,10 +335,3 @@ shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights,
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return result;
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}
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Topology *
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TopologyParams::create()
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{
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return new Topology(this);
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}
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@ -37,8 +37,8 @@
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* nodes. All edges have latency.
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*/
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#ifndef __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__
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#define __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__
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#ifndef __MEM_RUBY_NETWORK_TOPOLOGY_HH__
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#define __MEM_RUBY_NETWORK_TOPOLOGY_HH__
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#include <iostream>
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#include <string>
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@ -46,9 +46,7 @@
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#include "mem/protocol/LinkDirection.hh"
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#include "mem/ruby/common/TypeDefines.hh"
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#include "mem/ruby/network/BasicRouter.hh"
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#include "params/Topology.hh"
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#include "sim/sim_object.hh"
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#include "mem/ruby/network/BasicLink.hh"
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class NetDest;
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class Network;
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@ -63,21 +61,14 @@ struct LinkEntry
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typedef std::map<std::pair<int, int>, LinkEntry> LinkMap;
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class Topology : public SimObject
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class Topology
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{
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public:
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typedef TopologyParams Params;
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Topology(const Params *p);
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virtual ~Topology() {}
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const Params *params() const { return (const Params *)_params; }
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Topology(uint32_t num_routers, std::vector<BasicExtLink *> ext_links,
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std::vector<BasicIntLink *> int_links);
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void init();
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int numSwitches() const { return m_number_of_switches; }
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uint32_t numSwitches() const { return m_number_of_switches; }
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void createLinks(Network *net, bool isReconfiguration);
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void initNetworkPtr(Network* net_ptr);
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const std::string getName() { return m_name; }
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void print(std::ostream& out) const { out << "[Topology]"; }
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protected:
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@ -87,14 +78,8 @@ class Topology : public SimObject
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const NetDest& routing_table_entry,
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bool isReconfiguration);
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std::string getDesignStr();
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// Private copy constructor and assignment operator
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Topology(const Topology& obj);
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Topology& operator=(const Topology& obj);
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std::string m_name;
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NodeID m_nodes;
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int m_number_of_switches;
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uint32_t m_number_of_switches;
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std::vector<BasicExtLink*> m_ext_link_vector;
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std::vector<BasicIntLink*> m_int_link_vector;
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@ -103,7 +88,6 @@ class Topology : public SimObject
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Matrix m_component_inter_switches;
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LinkMap m_link_map;
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std::vector<BasicRouter*> m_router_vector;
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};
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inline std::ostream&
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@ -114,4 +98,4 @@ operator<<(std::ostream& out, const Topology& obj)
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return out;
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}
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#endif // __MEM_RUBY_NETWORK_SIMPLE_TOPOLOGY_HH__
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#endif // __MEM_RUBY_NETWORK_TOPOLOGY_HH__
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@ -46,17 +46,15 @@ BaseGarnetNetwork::BaseGarnetNetwork(const Params *p)
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// Currently Garnet only supports uniform bandwidth for all
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// links and network interfaces.
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for (std::vector<BasicExtLink*>::const_iterator i =
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m_topology_ptr->params()->ext_links.begin();
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i != m_topology_ptr->params()->ext_links.end(); ++i) {
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for (std::vector<BasicExtLink*>::const_iterator i = p->ext_links.begin();
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i != p->ext_links.end(); ++i) {
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BasicExtLink* ext_link = (*i);
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if (ext_link->params()->bandwidth_factor != m_ni_flit_size) {
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fatal("Garnet only supports uniform bw across all links and NIs\n");
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}
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}
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for (std::vector<BasicIntLink*>::const_iterator i =
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m_topology_ptr->params()->int_links.begin();
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i != m_topology_ptr->params()->int_links.end(); ++i) {
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for (std::vector<BasicIntLink*>::const_iterator i = p->int_links.begin();
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i != p->int_links.end(); ++i) {
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BasicIntLink* int_link = (*i);
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if (int_link->params()->bandwidth_factor != m_ni_flit_size) {
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fatal("Garnet only supports uniform bw across all links and NIs\n");
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@ -187,4 +185,3 @@ BaseGarnetNetwork::printPerformanceStats(ostream& out) const
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out << "-------------" << endl;
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out << endl;
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}
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