configs: add option for repeatedly switching back-and-forth between cpu types.
This patch adds a --repeat-switch option that will enable repeat core switching at a user defined period (set with --switch-freq option). currently, a switch can only occur between like CPU types. inorder CPU switching is not supported. *note* this patch simply allows a config that will perform repeat switching, it does not fix drain/switchout functionality. if you run with repeat switching you will hit assertion failures and/or your workload with hang or die.
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2 changed files with 93 additions and 19 deletions
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@ -104,11 +104,12 @@ def addCommonOptions(parser):
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# CPU Switching - default switch model goes from a checkpoint
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# to a timing simple CPU with caches to warm up, then to detailed CPU for
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# data measurement
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parser.add_option("-s", "--standard-switch", action="store_true",
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help="switch from timing CPU to Detailed CPU")
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parser.add_option("-w", "--warmup", action="store", type="int",
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help="if -s, then this is the warmup period. else, this is ignored",
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default=5000000000)
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parser.add_option("--repeat-switch", action="store", type="int",
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default=None,
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help="switch back and forth between CPUs with period <N>")
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parser.add_option("-s", "--standard-switch", action="store", type="int",
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default=None,
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help="switch from timing to Detailed CPU after warmup period of <N>")
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parser.add_option("-p", "--prog-interval", type="int",
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help="CPU Progress Interval")
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@ -214,10 +214,6 @@ def scriptCheckpoints(options):
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return exit_cause
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def benchCheckpoints(options, maxtick, cptdir):
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if options.fast_forward:
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m5.stats.reset()
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print "**** REAL SIMULATION ****"
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exit_event = m5.simulate(maxtick)
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exit_cause = exit_event.getCause()
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@ -236,6 +232,29 @@ def benchCheckpoints(options, maxtick, cptdir):
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return exit_cause
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def repeatSwitch(testsys, repeat_switch_cpu_list, maxtick, switch_freq):
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print "starting switch loop"
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while True:
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exit_event = m5.simulate(switch_freq)
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exit_cause = exit_event.getCause()
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if exit_cause != "simulate() limit reached":
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return exit_cause
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print "draining the system"
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m5.doDrain(testsys)
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m5.switchCpus(repeat_switch_cpu_list)
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m5.resume(testsys)
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tmp_cpu_list = []
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for old_cpu, new_cpu in repeat_switch_cpu_list:
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tmp_cpu_list.append((new_cpu, old_cpu))
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repeat_switch_cpu_list = tmp_cpu_list
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if (maxtick - m5.curTick()) <= switch_freq:
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exit_event = m5.simulate(maxtick - m5.curTick())
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return exit_event.getCause()
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def run(options, root, testsys, cpu_class):
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if options.maxtick:
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maxtick = options.maxtick
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@ -259,6 +278,12 @@ def run(options, root, testsys, cpu_class):
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if options.standard_switch and not options.caches:
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fatal("Must specify --caches when using --standard-switch")
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if options.standard_switch and options.repeat_switch:
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fatal("Can't specify both --standard-switch and --repeat-switch")
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if options.repeat_switch and options.take_checkpoints:
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fatal("Can't specify both --repeat-switch and --take-checkpoints")
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np = options.num_cpus
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switch_cpus = None
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@ -271,7 +296,7 @@ def run(options, root, testsys, cpu_class):
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testsys.cpu[i].max_insts_any_thread = options.maxinsts
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if cpu_class:
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switch_cpus = [cpu_class(defer_registration=True, cpu_id=(np+i))
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switch_cpus = [cpu_class(defer_registration=True, cpu_id=(i))
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for i in xrange(np)]
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for i in xrange(np):
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@ -290,15 +315,55 @@ def run(options, root, testsys, cpu_class):
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testsys.switch_cpus = switch_cpus
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switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
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if options.standard_switch:
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if options.repeat_switch:
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if options.cpu_type == "arm_detailed":
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if not options.caches:
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# O3 CPU must have a cache to work.
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print "O3 CPU must be used with caches"
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sys.exit(1)
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switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(np+i))
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repeat_switch_cpus = [O3_ARM_v7a_3(defer_registration=True, \
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cpu_id=(i)) for i in xrange(np)]
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elif options.cpu_type == "detailed":
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if not options.caches:
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print "O3 CPU must be used with caches"
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sys.exit(1)
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repeat_switch_cpus = [DerivO3CPU(defer_registration=True, \
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cpu_id=(i)) for i in xrange(np)]
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elif options.cpu_type == "inorder":
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print "inorder CPU switching not supported"
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sys.exit(1)
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elif options.cpu_type == "timing":
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repeat_switch_cpus = [TimingSimpleCPU(defer_registration=True, \
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cpu_id=(i)) for i in xrange(np)]
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else:
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repeat_switch_cpus = [AtomicSimpleCPU(defer_registration=True, \
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cpu_id=(i)) for i in xrange(np)]
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for i in xrange(np):
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repeat_switch_cpus[i].system = testsys
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repeat_switch_cpus[i].workload = testsys.cpu[i].workload
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repeat_switch_cpus[i].clock = testsys.cpu[i].clock
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if options.maxinsts:
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repeat_switch_cpus[i].max_insts_any_thread = options.maxinsts
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if options.checker:
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repeat_switch_cpus[i].addCheckerCpu()
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testsys.repeat_switch_cpus = repeat_switch_cpus
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if cpu_class:
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repeat_switch_cpu_list = [(switch_cpus[i], repeat_switch_cpus[i])
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for i in xrange(np)]
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switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(2*np+i))
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else:
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repeat_switch_cpu_list = [(testsys.cpu[i], repeat_switch_cpus[i])
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for i in xrange(np)]
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if options.standard_switch:
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switch_cpus = [TimingSimpleCPU(defer_registration=True, cpu_id=(i))
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for i in xrange(np)]
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switch_cpus_1 = [DerivO3CPU(defer_registration=True, cpu_id=(i))
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for i in xrange(np)]
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for i in xrange(np):
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@ -400,7 +465,7 @@ def run(options, root, testsys, cpu_class):
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if options.warmup_insts:
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exit_event = m5.simulate()
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else:
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exit_event = m5.simulate(options.warmup)
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exit_event = m5.simulate(options.standard_switch)
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print "Switching CPUS @ tick %s" % (m5.curTick())
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print "Simulation ends instruction count:%d" % \
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(testsys.switch_cpus_1[0].max_insts_any_thread)
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@ -425,8 +490,16 @@ def run(options, root, testsys, cpu_class):
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# favor of command line checkpoint instructions.
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exit_cause = scriptCheckpoints(options)
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else:
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if options.fast_forward:
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m5.stats.reset()
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print "**** REAL SIMULATION ****"
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# If checkpoints are being taken, then the checkpoint instruction
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# will occur in the benchmark code it self.
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if options.repeat_switch and maxtick > options.repeat_switch:
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exit_cause = repeatSwitch(testsys, repeat_switch_cpu_list,
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maxtick, options.repeat_switch)
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else:
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exit_cause = benchCheckpoints(options, maxtick, cptdir)
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print 'Exiting @ tick %i because %s' % (m5.curTick(), exit_cause)
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