diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index cff3fd28b..510e67ba6 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -172,7 +172,6 @@ class Cache : public BaseCache
      * Populates a cache block and handles all outstanding requests for the
      * satisfied fill request. This version takes two memory requests. One
      * contains the fill data, the other is an optional target to satisfy.
-     * Used for Cache::probe.
      * @param pkt The memory request with the fill data.
      * @param blk The cache block if it already exists.
      * @param writebacks List for any writebacks that need to be performed.
diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc
index 607e89a75..8a2f4eb13 100644
--- a/src/mem/cache/tags/fa_lru.cc
+++ b/src/mem/cache/tags/fa_lru.cc
@@ -144,14 +144,6 @@ FALRU::hashLookup(Addr addr) const
     return NULL;
 }
 
-bool
-FALRU::probe(Addr addr) const
-{
-    Addr blkAddr = blkAlign(addr);
-    FALRUBlk* blk = hashLookup(blkAddr);
-    return blk && blk->tag == blkAddr && blk->isValid();
-}
-
 void
 FALRU::invalidateBlk(FALRU::BlkType *blk)
 {
diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh
index cabcf18b4..43b3b5832 100644
--- a/src/mem/cache/tags/fa_lru.hh
+++ b/src/mem/cache/tags/fa_lru.hh
@@ -164,14 +164,6 @@ public:
      */
     void regStats(const std::string &name);
 
-    /**
-     * Return true if the address is found in the cache.
-     * @param asid The address space ID.
-     * @param addr The address to look for.
-     * @return True if the address is in the cache.
-     */
-    bool probe(Addr addr) const;
-
     /**
      * Invalidate a cache block.
      * @param blk The block to invalidate.
diff --git a/src/mem/cache/tags/iic.cc b/src/mem/cache/tags/iic.cc
index af9a75d43..31fd87df6 100644
--- a/src/mem/cache/tags/iic.cc
+++ b/src/mem/cache/tags/iic.cc
@@ -219,12 +219,6 @@ IIC::regStats(const string &name)
         ;
 }
 
-// probe cache for presence of given block.
-bool
-IIC::probe(Addr addr) const
-{
-    return (findBlock(addr) != NULL);
-}
 
 IICTag*
 IIC::findBlock(Addr addr, int &lat)
diff --git a/src/mem/cache/tags/iic.hh b/src/mem/cache/tags/iic.hh
index c9d080683..0d513cf92 100644
--- a/src/mem/cache/tags/iic.hh
+++ b/src/mem/cache/tags/iic.hh
@@ -384,14 +384,6 @@ class IIC : public BaseTags
         return (addr & ~(Addr)blkMask);
     }
 
-    /**
-     * Check for the address in the tagstore.
-     * @param asid The address space ID.
-     * @param addr The address to find.
-     * @return true if it is found.
-     */
-    bool probe(Addr addr) const;
-
     /**
      * Swap the position of two tags.
      * @param index1 The first tag location.
diff --git a/src/mem/cache/tags/lru.cc b/src/mem/cache/tags/lru.cc
index 7fb5318a0..2a82202e0 100644
--- a/src/mem/cache/tags/lru.cc
+++ b/src/mem/cache/tags/lru.cc
@@ -150,19 +150,6 @@ LRU::~LRU()
     delete [] sets;
 }
 
-// probe cache for presence of given block.
-bool
-LRU::probe(Addr addr) const
-{
-    //  return(findBlock(Read, addr, asid) != 0);
-    Addr tag = extractTag(addr);
-    unsigned myset = extractSet(addr);
-
-    LRUBlk *blk = sets[myset].findBlk(tag);
-
-    return (blk != NULL);       // true if in cache
-}
-
 LRUBlk*
 LRU::findBlock(Addr addr, int &lat)
 {
diff --git a/src/mem/cache/tags/lru.hh b/src/mem/cache/tags/lru.hh
index 65be492de..39b547f57 100644
--- a/src/mem/cache/tags/lru.hh
+++ b/src/mem/cache/tags/lru.hh
@@ -153,14 +153,6 @@ public:
         return blkSize;
     }
 
-    /**
-     * Search for the address in the cache.
-     * @param asid The address space ID.
-     * @param addr The address to find.
-     * @return True if the address is in the cache.
-     */
-    bool probe(Addr addr) const;
-
     /**
      * Invalidate the given block.
      * @param blk The block to invalidate.