cpu: add separate stats for insts/ops both globally and per cpu model
This commit is contained in:
parent
230540e655
commit
542d0ceebc
15 changed files with 172 additions and 38 deletions
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@ -2,5 +2,6 @@
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class BaseCPU
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{
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public:
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static int numSimulatedInstructions() { return 0; }
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static int numSimulatedInsts() { return 0; }
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static int numSimulatedOps() { return 0; }
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};
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@ -93,7 +93,7 @@ CPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival)
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void
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CPUProgressEvent::process()
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{
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Counter temp = cpu->totalInstructions();
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Counter temp = cpu->totalOps();
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#ifndef NDEBUG
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double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1));
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@ -331,7 +331,9 @@ class BaseCPU : public MemObject
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*/
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virtual BranchPred *getBranchPred() { return NULL; };
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virtual Counter totalInstructions() const = 0;
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virtual Counter totalInsts() const = 0;
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virtual Counter totalOps() const = 0;
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// Function tracing
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private:
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@ -354,13 +356,24 @@ class BaseCPU : public MemObject
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}
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static int numSimulatedCPUs() { return cpuList.size(); }
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static Counter numSimulatedInstructions()
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static Counter numSimulatedInsts()
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{
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Counter total = 0;
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int size = cpuList.size();
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for (int i = 0; i < size; ++i)
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total += cpuList[i]->totalInstructions();
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total += cpuList[i]->totalInsts();
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return total;
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}
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static Counter numSimulatedOps()
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{
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Counter total = 0;
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int size = cpuList.size();
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for (int i = 0; i < size; ++i)
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total += cpuList[i]->totalOps();
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return total;
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}
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@ -634,16 +634,21 @@ InOrderCPU::regStats()
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committedInsts
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.init(numThreads)
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.name(name() + ".committedInsts")
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.desc("Number of Instructions Simulated (Per-Thread)");
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.desc("Number of Instructions committed (Per-Thread)");
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committedOps
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.init(numThreads)
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.name(name() + ".committedOps")
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.desc("Number of Ops committed (Per-Thread)");
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smtCommittedInsts
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.init(numThreads)
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.name(name() + ".smtCommittedInsts")
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.desc("Number of SMT Instructions Simulated (Per-Thread)");
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.desc("Number of SMT Instructions committed (Per-Thread)");
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totalCommittedInsts
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.name(name() + ".committedInsts_total")
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.desc("Number of Instructions Simulated (Total)");
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.desc("Number of Instructions committed (Total)");
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cpi
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.name(name() + ".cpi")
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@ -1437,18 +1442,25 @@ InOrderCPU::instDone(DynInstPtr inst, ThreadID tid)
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// Increment thread-state's instruction count
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thread[tid]->numInst++;
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thread[tid]->numOp++;
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// Increment thread-state's instruction stats
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thread[tid]->numInsts++;
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thread[tid]->numOps++;
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// Count committed insts per thread stats
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if (!inst->isMicroop() || inst->isLastMicroop()) {
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committedInsts[tid]++;
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// Count total insts committed stat
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totalCommittedInsts++;
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}
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committedOps[tid]++;
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// Count SMT-committed insts per thread stat
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if (numActiveThreads() > 1) {
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if (!inst->isMicroop() || inst->isLastMicroop())
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smtCommittedInsts[tid]++;
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}
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@ -1470,7 +1482,7 @@ InOrderCPU::instDone(DynInstPtr inst, ThreadID tid)
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}
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// Check for instruction-count-based events.
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comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
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comInstEventQueue[tid]->serviceEvents(thread[tid]->numOp);
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// Finally, remove instruction from CPU
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removeInst(inst);
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@ -765,7 +765,7 @@ class InOrderCPU : public BaseCPU
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}
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/** Count the Total Instructions Committed in the CPU. */
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virtual Counter totalInstructions() const
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virtual Counter totalInsts() const
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{
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Counter total(0);
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@ -775,6 +775,17 @@ class InOrderCPU : public BaseCPU
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return total;
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}
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/** Count the Total Ops Committed in the CPU. */
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virtual Counter totalOps() const
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{
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Counter total(0);
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for (ThreadID tid = 0; tid < (ThreadID)thread.size(); tid++)
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total += thread[tid]->numOp;
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return total;
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}
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/** Pointer to the system. */
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System *system;
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@ -855,6 +866,9 @@ class InOrderCPU : public BaseCPU
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/** Stat for the number of committed instructions per thread. */
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Stats::Vector committedInsts;
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/** Stat for the number of committed ops per thread. */
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Stats::Vector committedOps;
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/** Stat for the number of committed instructions per thread. */
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Stats::Vector smtCommittedInsts;
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@ -398,6 +398,8 @@ class InOrderDynInst : public FastAlloc, public RefCounted
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bool isUnverifiable() const { return staticInst->isUnverifiable(); }
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bool isSyscall() const
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{ return staticInst->isSyscall(); }
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bool isMicroop() const { return staticInst->isMicroop(); }
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bool isLastMicroop() const { return staticInst->isLastMicroop(); }
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/////////////////////////////////////////////
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@ -449,6 +449,8 @@ class DefaultCommit
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/** Stat for the total number of committed instructions. */
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Stats::Scalar commitCommittedInsts;
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/** Stat for the total number of committed ops. */
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Stats::Scalar commitCommittedOps;
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/** Stat for the total number of squashed instructions discarded by commit.
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*/
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Stats::Scalar commitSquashedInsts;
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@ -466,7 +468,9 @@ class DefaultCommit
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Stats::Distribution numCommittedDist;
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/** Total number of instructions committed. */
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Stats::Vector statComInst;
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Stats::Vector instsCommitted;
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/** Total number of ops (including micro ops) committed. */
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Stats::Vector opsCommitted;
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/** Total number of software prefetches committed. */
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Stats::Vector statComSwp;
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/** Stat for the total number of committed memory references. */
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@ -169,6 +169,10 @@ DefaultCommit<Impl>::regStats()
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.name(name() + ".commitCommittedInsts")
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.desc("The number of committed instructions")
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.prereq(commitCommittedInsts);
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commitCommittedOps
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.name(name() + ".commitCommittedOps")
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.desc("The number of committed instructions")
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.prereq(commitCommittedInsts);
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commitSquashedInsts
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.name(name() + ".commitSquashedInsts")
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.desc("The number of squashed insts skipped by commit")
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@ -193,13 +197,20 @@ DefaultCommit<Impl>::regStats()
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.flags(Stats::pdf)
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;
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statComInst
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instsCommitted
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.init(cpu->numThreads)
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.name(name() + ".count")
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.name(name() + ".committedInsts")
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.desc("Number of instructions committed")
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.flags(total)
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;
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opsCommitted
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.init(cpu->numThreads)
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.name(name() + ".committedOps")
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.desc("Number of ops (including micro ops) committed")
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.flags(total)
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;
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statComSwp
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.init(cpu->numThreads)
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.name(name() + ".swp_count")
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@ -988,12 +999,14 @@ DefaultCommit<Impl>::commitInsts()
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// Set the doneSeqNum to the youngest committed instruction.
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toIEW->commitInfo[tid].doneSeqNum = head_inst->seqNum;
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if (!head_inst->isMicroop() || head_inst->isLastMicroop())
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++commitCommittedInsts;
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++commitCommittedOps;
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// To match the old model, don't count nops and instruction
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// prefetches towards the total commit count.
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if (!head_inst->isNop() && !head_inst->isInstPrefetch()) {
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cpu->instDone(tid);
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cpu->instDone(tid, head_inst);
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}
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if (tid == 0) {
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@ -1175,7 +1188,7 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
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if (head_inst->traceData) {
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if (DTRACE(ExecFaulting)) {
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head_inst->traceData->setFetchSeq(head_inst->seqNum);
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head_inst->traceData->setCPSeq(thread[tid]->numInst);
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head_inst->traceData->setCPSeq(thread[tid]->numOp);
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head_inst->traceData->dump();
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}
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delete head_inst->traceData;
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@ -1209,7 +1222,7 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
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head_inst->seqNum, head_inst->pcState());
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if (head_inst->traceData) {
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head_inst->traceData->setFetchSeq(head_inst->seqNum);
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head_inst->traceData->setCPSeq(thread[tid]->numInst);
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head_inst->traceData->setCPSeq(thread[tid]->numOp);
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head_inst->traceData->dump();
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delete head_inst->traceData;
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head_inst->traceData = NULL;
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@ -1360,10 +1373,14 @@ DefaultCommit<Impl>::updateComInstStats(DynInstPtr &inst)
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if (inst->isDataPrefetch()) {
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statComSwp[tid]++;
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} else {
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statComInst[tid]++;
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if (!inst->isMicroop() || inst->isLastMicroop())
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instsCommitted[tid]++;
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opsCommitted[tid]++;
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}
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#else
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statComInst[tid]++;
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if (!inst->isMicroop() || inst->isLastMicroop())
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instsCommitted[tid]++;
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opsCommitted[tid]++;
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#endif
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//
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@ -506,6 +506,11 @@ FullO3CPU<Impl>::regStats()
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.name(name() + ".committedInsts")
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.desc("Number of Instructions Simulated");
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committedOps
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.init(numThreads)
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.name(name() + ".committedOps")
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.desc("Number of Ops (including micro ops) Simulated");
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totalCommittedInsts
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.name(name() + ".committedInsts_total")
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.desc("Number of Instructions Simulated");
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@ -718,7 +723,7 @@ FullO3CPU<Impl>::deactivateThread(ThreadID tid)
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template <class Impl>
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Counter
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FullO3CPU<Impl>::totalInstructions() const
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FullO3CPU<Impl>::totalInsts() const
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{
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Counter total(0);
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@ -729,6 +734,19 @@ FullO3CPU<Impl>::totalInstructions() const
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return total;
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}
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template <class Impl>
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Counter
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FullO3CPU<Impl>::totalOps() const
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{
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Counter total(0);
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ThreadID size = thread.size();
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for (ThreadID i = 0; i < size; i++)
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total += thread[i]->numOp;
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return total;
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}
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template <class Impl>
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void
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FullO3CPU<Impl>::activateContext(ThreadID tid, int delay)
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@ -1458,13 +1476,19 @@ FullO3CPU<Impl>::addInst(DynInstPtr &inst)
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template <class Impl>
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void
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FullO3CPU<Impl>::instDone(ThreadID tid)
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FullO3CPU<Impl>::instDone(ThreadID tid, DynInstPtr &inst)
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{
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// Keep an instruction count.
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if (!inst->isMicroop() || inst->isLastMicroop()) {
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thread[tid]->numInst++;
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thread[tid]->numInsts++;
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committedInsts[tid]++;
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totalCommittedInsts++;
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}
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thread[tid]->numOp++;
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thread[tid]->numOps++;
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committedOps[tid]++;
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system->totalNumInsts++;
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// Check for instruction-count-based events.
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comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
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@ -389,7 +389,10 @@ class FullO3CPU : public BaseO3CPU
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void removeThread(ThreadID tid);
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/** Count the Total Instructions Committed in the CPU. */
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virtual Counter totalInstructions() const;
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virtual Counter totalInsts() const;
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/** Count the Total Ops (including micro ops) committed in the CPU. */
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virtual Counter totalOps() const;
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/** Add Thread to Active Threads List. */
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void activateContext(ThreadID tid, int delay);
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@ -547,7 +550,7 @@ class FullO3CPU : public BaseO3CPU
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ListIt addInst(DynInstPtr &inst);
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/** Function to tell the CPU that an instruction has completed. */
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void instDone(ThreadID tid);
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void instDone(ThreadID tid, DynInstPtr &inst);
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/** Remove an instruction from the front end of the list. There's
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* no restriction on location of the instruction.
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@ -797,6 +800,8 @@ class FullO3CPU : public BaseO3CPU
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Stats::Scalar quiesceCycles;
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/** Stat for the number of committed instructions per thread. */
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Stats::Vector committedInsts;
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/** Stat for the number of committed ops (including micro ops) per thread. */
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Stats::Vector committedOps;
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/** Stat for the total number of committed instructions. */
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Stats::Scalar totalCommittedInsts;
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/** Stat for the CPI per thread. */
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@ -116,6 +116,8 @@ BaseSimpleCPU::BaseSimpleCPU(BaseSimpleCPUParams *p)
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numInst = 0;
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startNumInst = 0;
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numOp = 0;
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startNumOp = 0;
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numLoad = 0;
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startNumLoad = 0;
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lastIcacheStall = 0;
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@ -156,8 +158,13 @@ BaseSimpleCPU::regStats()
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BaseCPU::regStats();
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numInsts
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.name(name() + ".num_insts")
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.desc("Number of instructions executed")
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.name(name() + ".committedInsts")
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.desc("Number of instructions committed")
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;
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numOps
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.name(name() + ".committedOps")
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.desc("Number of ops (including micro ops) committed")
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;
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numIntAluAccesses
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@ -189,20 +189,33 @@ class BaseSimpleCPU : public BaseCPU
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Counter numInst;
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Counter startNumInst;
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Stats::Scalar numInsts;
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Counter numOp;
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Counter startNumOp;
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Stats::Scalar numOps;
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void countInst()
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{
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if (!curStaticInst->isMicroop() || curStaticInst->isLastMicroop()) {
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numInst++;
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numInsts++;
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}
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numOp++;
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numOps++;
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system->totalNumInsts++;
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thread->funcExeInst++;
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}
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virtual Counter totalInstructions() const
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virtual Counter totalInsts() const
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{
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return numInst - startNumInst;
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}
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virtual Counter totalOps() const
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{
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return numOp - startNumOp;
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}
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//number of integer alu accesses
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Stats::Scalar numIntAluAccesses;
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@ -43,7 +43,7 @@
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#include "sim/system.hh"
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ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
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: numInst(0), numLoad(0), _status(ThreadContext::Halted),
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: numInst(0), numOp(0), numLoad(0), _status(ThreadContext::Halted),
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baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
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profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
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kernelStats(NULL), process(_process), physProxy(NULL), virtProxy(NULL),
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@ -132,6 +132,10 @@ struct ThreadState {
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Counter numInst;
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/** Stat for number instructions committed. */
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Stats::Scalar numInsts;
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/** Number of ops (including micro ops) committed. */
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Counter numOp;
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/** Stat for number ops (including micro ops) committed. */
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Stats::Scalar numOps;
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/** Stat for number of memory references. */
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Stats::Scalar numMemRefs;
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@ -97,11 +97,13 @@ SimTicksReset simTicksReset;
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struct Global
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{
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Stats::Formula hostInstRate;
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Stats::Formula hostOpRate;
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Stats::Formula hostTickRate;
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Stats::Value hostMemory;
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Stats::Value hostSeconds;
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Stats::Value simInsts;
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Stats::Value simOps;
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Global();
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};
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@ -109,13 +111,21 @@ struct Global
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Global::Global()
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{
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simInsts
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.functor(BaseCPU::numSimulatedInstructions)
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.functor(BaseCPU::numSimulatedInsts)
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.name("sim_insts")
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.desc("Number of instructions simulated")
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.precision(0)
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.prereq(simInsts)
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;
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simOps
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.functor(BaseCPU::numSimulatedOps)
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.name("sim_ops")
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.desc("Number of ops (including micro ops) simulated")
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.precision(0)
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.prereq(simOps)
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;
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simSeconds
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.name("sim_seconds")
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.desc("Number of seconds simulated")
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@ -147,6 +157,13 @@ Global::Global()
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.prereq(simInsts)
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;
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hostOpRate
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.name("host_op_rate")
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.desc("Simulator op (including micro ops) rate (op/s)")
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.precision(0)
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.prereq(simOps)
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||||
;
|
||||
|
||||
hostMemory
|
||||
.functor(memUsage)
|
||||
.name("host_mem_usage")
|
||||
|
@ -169,6 +186,7 @@ Global::Global()
|
|||
|
||||
simSeconds = simTicks / simFreq;
|
||||
hostInstRate = simInsts / hostSeconds;
|
||||
hostOpRate = simOps / hostSeconds;
|
||||
hostTickRate = simTicks / hostSeconds;
|
||||
|
||||
registerResetCallback(&simTicksReset);
|
||||
|
|
Loading…
Reference in a new issue