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fixes for solaris compile

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--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
This commit is contained in:
Ali Saidi 2007-04-21 19:11:38 -04:00
parent e8ace88e89
commit 53ba34391f
6 changed files with 17 additions and 15 deletions
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14
src/arch/alpha/ev5.cc
View file

@ -245,13 +245,13 @@ AlphaISA::MiscRegFile::readIpr(int idx, ThreadContext *tc)
{ {
AlphaISA::PTE &pte = tc->getDTBPtr()->index(!tc->misspeculating()); AlphaISA::PTE &pte = tc->getDTBPtr()->index(!tc->misspeculating());
retval |= ((u_int64_t)pte.ppn & ULL(0x7ffffff)) << 32; retval |= ((uint64_t)pte.ppn & ULL(0x7ffffff)) << 32;
retval |= ((u_int64_t)pte.xre & ULL(0xf)) << 8; retval |= ((uint64_t)pte.xre & ULL(0xf)) << 8;
retval |= ((u_int64_t)pte.xwe & ULL(0xf)) << 12; retval |= ((uint64_t)pte.xwe & ULL(0xf)) << 12;
retval |= ((u_int64_t)pte.fonr & ULL(0x1)) << 1; retval |= ((uint64_t)pte.fonr & ULL(0x1)) << 1;
retval |= ((u_int64_t)pte.fonw & ULL(0x1))<< 2; retval |= ((uint64_t)pte.fonw & ULL(0x1))<< 2;
retval |= ((u_int64_t)pte.asma & ULL(0x1)) << 4; retval |= ((uint64_t)pte.asma & ULL(0x1)) << 4;
retval |= ((u_int64_t)pte.asn & ULL(0x7f)) << 57; retval |= ((uint64_t)pte.asn & ULL(0x7f)) << 57;
} }
break; break;

4
src/arch/alpha/floatregfile.hh
View file

@ -35,7 +35,7 @@
#include "arch/alpha/isa_traits.hh" #include "arch/alpha/isa_traits.hh"
#include "arch/alpha/types.hh" #include "arch/alpha/types.hh"
#include <string.h> #include <cstring>
#include <iostream> #include <iostream>
class Checkpoint; class Checkpoint;
@ -61,7 +61,7 @@ namespace AlphaISA
void unserialize(Checkpoint *cp, const std::string &section); void unserialize(Checkpoint *cp, const std::string &section);
void clear() void clear()
{ bzero(d, sizeof(d)); } { std::memset(d, 0, sizeof(d)); }
}; };
} }

4
src/arch/alpha/intregfile.hh
View file

@ -35,7 +35,7 @@
#include "arch/alpha/types.hh" #include "arch/alpha/types.hh"
#include <iostream> #include <iostream>
#include <strings.h> #include <cstring>
class Checkpoint; class Checkpoint;
@ -71,7 +71,7 @@ namespace AlphaISA
void unserialize(Checkpoint *cp, const std::string &section); void unserialize(Checkpoint *cp, const std::string &section);
void clear() void clear()
{ bzero(regs, sizeof(regs)); } { std::memset(regs, 0, sizeof(regs)); }
}; };
} }

3
src/base/random.cc
View file

@ -37,6 +37,7 @@
#include <cstdlib> #include <cstdlib>
#include <cmath> #include <cmath>
#include "base/fenv.hh"
#include "base/random.hh" #include "base/random.hh"
using namespace std; using namespace std;
@ -59,7 +60,7 @@ m5round(double r)
#if defined(__sun) #if defined(__sun)
double val; double val;
int oldrnd = m5_fegetround(); int oldrnd = m5_fegetround();
m5_fesetround(M5_FP_TONEAREST); m5_fesetround(M5_FE_TONEAREST);
val = rint(r); val = rint(r);
m5_fesetround(oldrnd); m5_fesetround(oldrnd);
return val; return val;

5
src/cpu/o3/lsq_unit.hh
View file

@ -33,6 +33,7 @@
#define __CPU_O3_LSQ_UNIT_HH__ #define __CPU_O3_LSQ_UNIT_HH__
#include <algorithm> #include <algorithm>
#include <cstring>
#include <map> #include <map>
#include <queue> #include <queue>
@ -292,7 +293,7 @@ class LSQUnit {
: inst(NULL), req(NULL), size(0), : inst(NULL), req(NULL), size(0),
canWB(0), committed(0), completed(0) canWB(0), committed(0), completed(0)
{ {
bzero(data, sizeof(data)); std::memset(data, 0, sizeof(data));
} }
/** Constructs a store queue entry for a given instruction. */ /** Constructs a store queue entry for a given instruction. */
@ -300,7 +301,7 @@ class LSQUnit {
: inst(_inst), req(NULL), size(0), : inst(_inst), req(NULL), size(0),
canWB(0), committed(0), completed(0) canWB(0), committed(0), completed(0)
{ {
bzero(data, sizeof(data)); std::memset(data, 0, sizeof(data));
} }
/** The store instruction. */ /** The store instruction. */

2
src/dev/alpha/console.cc
View file

@ -76,7 +76,7 @@ AlphaConsole::AlphaConsole(Params *p)
alphaAccess->diskOperation = 0; alphaAccess->diskOperation = 0;
alphaAccess->outputChar = 0; alphaAccess->outputChar = 0;
alphaAccess->inputChar = 0; alphaAccess->inputChar = 0;
bzero(alphaAccess->cpuStack, sizeof(alphaAccess->cpuStack)); std::memset(alphaAccess->cpuStack, 0, sizeof(alphaAccess->cpuStack));
} }