Enable building only selected CPU models via new scons
CPU_MODELS parameter. For example: scons CPU_MODELS="SimpleCPU,FullCPU" ALPHA_SE/m5.debug Unfortunately the option is not sticky due to a scons bug with saving & restoring ListOption parameters. SConscript: Separate out cpu-model-specific files so they can be conditionally included based on value of new CPU_MODELS parameter. Most of these are now handled in cpu/SConscript, except for FullCPU which is still in this file. arch/SConscript: The set of CPU-model-specific execute files must now be determined from the CPU_MODELS parameter, via the new cpu_models.py file. Also pass the list of configured CPU models to isa_parser.py. arch/isa_parser.py: Move CpuModel definition and objects out to a separate file so they can be shared with scons. Global list of CPU models to generate code for is now controlled by command-line parameters (so we can do only a subset of the available ones). build/SConstruct: Define new CPU_MODELS ListOption. cpu/static_inst.hh: Rename static_inst_impl.hh to static_inst_exec_sigs.hh. --HG-- extra : convert_revision : 163df32a76d4c05900490b2bce4c7962a5e3f614
This commit is contained in:
parent
4f831bc561
commit
51647e7bec
7 changed files with 256 additions and 115 deletions
108
SConscript
108
SConscript
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@ -86,31 +86,7 @@ base_sources = Split('''
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cpu/exetrace.cc
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cpu/pc_event.cc
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cpu/static_inst.cc
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cpu/o3/2bit_local_pred.cc
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cpu/o3/alpha_dyn_inst.cc
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cpu/o3/alpha_cpu.cc
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cpu/o3/alpha_cpu_builder.cc
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cpu/o3/bpred_unit.cc
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cpu/o3/btb.cc
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cpu/o3/commit.cc
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cpu/o3/decode.cc
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cpu/o3/fetch.cc
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cpu/o3/free_list.cc
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cpu/o3/cpu.cc
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cpu/o3/iew.cc
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cpu/o3/inst_queue.cc
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cpu/o3/ldstq.cc
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cpu/o3/mem_dep_unit.cc
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cpu/o3/ras.cc
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cpu/o3/rename.cc
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cpu/o3/rename_map.cc
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cpu/o3/rob.cc
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cpu/o3/sat_counter.cc
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cpu/o3/store_set.cc
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cpu/o3/tournament_pred.cc
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cpu/fast/cpu.cc
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cpu/sampler/sampler.cc
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cpu/simple/cpu.cc
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cpu/trace/reader/mem_trace_reader.cc
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cpu/trace/reader/ibm_reader.cc
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cpu/trace/reader/itx_reader.cc
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@ -118,41 +94,6 @@ base_sources = Split('''
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cpu/trace/opt_cpu.cc
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cpu/trace/trace_cpu.cc
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encumbered/cpu/full/bpred.cc
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encumbered/cpu/full/commit.cc
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encumbered/cpu/full/cpu.cc
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encumbered/cpu/full/create_vector.cc
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encumbered/cpu/full/cv_spec_state.cc
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encumbered/cpu/full/dd_queue.cc
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encumbered/cpu/full/dep_link.cc
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encumbered/cpu/full/dispatch.cc
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encumbered/cpu/full/dyn_inst.cc
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encumbered/cpu/full/execute.cc
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encumbered/cpu/full/fetch.cc
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encumbered/cpu/full/floss_reasons.cc
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encumbered/cpu/full/fu_pool.cc
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encumbered/cpu/full/inst_fifo.cc
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encumbered/cpu/full/instpipe.cc
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encumbered/cpu/full/issue.cc
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encumbered/cpu/full/ls_queue.cc
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encumbered/cpu/full/machine_queue.cc
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encumbered/cpu/full/pipetrace.cc
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encumbered/cpu/full/readyq.cc
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encumbered/cpu/full/reg_info.cc
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encumbered/cpu/full/rob_station.cc
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encumbered/cpu/full/spec_memory.cc
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encumbered/cpu/full/spec_state.cc
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encumbered/cpu/full/storebuffer.cc
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encumbered/cpu/full/writeback.cc
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encumbered/cpu/full/iq/iq_station.cc
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encumbered/cpu/full/iq/iqueue.cc
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encumbered/cpu/full/iq/segmented/chain_info.cc
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encumbered/cpu/full/iq/segmented/chain_wire.cc
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encumbered/cpu/full/iq/segmented/iq_seg.cc
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encumbered/cpu/full/iq/segmented/iq_segmented.cc
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encumbered/cpu/full/iq/segmented/seg_chain.cc
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encumbered/cpu/full/iq/seznec/iq_seznec.cc
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encumbered/cpu/full/iq/standard/iq_standard.cc
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encumbered/mem/functional/main.cc
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mem/base_hier.cc
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@ -224,6 +165,45 @@ base_sources = Split('''
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sim/trace_context.cc
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''')
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# Old FullCPU sources
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full_cpu_sources = Split('''
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encumbered/cpu/full/bpred.cc
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encumbered/cpu/full/commit.cc
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encumbered/cpu/full/cpu.cc
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encumbered/cpu/full/create_vector.cc
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encumbered/cpu/full/cv_spec_state.cc
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encumbered/cpu/full/dd_queue.cc
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encumbered/cpu/full/dep_link.cc
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encumbered/cpu/full/dispatch.cc
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encumbered/cpu/full/dyn_inst.cc
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encumbered/cpu/full/execute.cc
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encumbered/cpu/full/fetch.cc
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encumbered/cpu/full/floss_reasons.cc
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encumbered/cpu/full/fu_pool.cc
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encumbered/cpu/full/inst_fifo.cc
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encumbered/cpu/full/instpipe.cc
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encumbered/cpu/full/issue.cc
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encumbered/cpu/full/ls_queue.cc
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encumbered/cpu/full/machine_queue.cc
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encumbered/cpu/full/pipetrace.cc
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encumbered/cpu/full/readyq.cc
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encumbered/cpu/full/reg_info.cc
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encumbered/cpu/full/rob_station.cc
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encumbered/cpu/full/spec_memory.cc
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encumbered/cpu/full/spec_state.cc
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encumbered/cpu/full/storebuffer.cc
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encumbered/cpu/full/writeback.cc
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encumbered/cpu/full/iq/iq_station.cc
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encumbered/cpu/full/iq/iqueue.cc
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encumbered/cpu/full/iq/segmented/chain_info.cc
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encumbered/cpu/full/iq/segmented/chain_wire.cc
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encumbered/cpu/full/iq/segmented/iq_seg.cc
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encumbered/cpu/full/iq/segmented/iq_segmented.cc
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encumbered/cpu/full/iq/segmented/seg_chain.cc
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encumbered/cpu/full/iq/seznec/iq_seznec.cc
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encumbered/cpu/full/iq/standard/iq_standard.cc
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''')
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# MySql sources
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mysql_sources = Split('''
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base/mysql.cc
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@ -349,8 +329,16 @@ env.Append(CPPDEFINES=[('THE_ISA','%s_ISA' % env['TARGET_ISA'].upper())])
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arch_sources = SConscript('arch/SConscript',
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exports = 'env', duplicate = False)
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cpu_sources = SConscript('cpu/SConscript',
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exports = 'env', duplicate = False)
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# This is outside of cpu/SConscript since the source directory isn't
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# underneath 'cpu'.
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if 'FullCPU' in env['CPU_MODELS']:
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cpu_sources += full_cpu_sources
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# Set up complete list of sources based on configuration.
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sources = base_sources + arch_sources
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sources = base_sources + arch_sources + cpu_sources
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if env['FULL_SYSTEM']:
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sources += full_system_sources
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@ -108,26 +108,27 @@ env.Append(SCANNERS = iscan)
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# output from the ISA description (*.isa) files.
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#
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# several files are generated from the ISA description
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isa_desc_gen_files = Split('''
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decoder.cc
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alpha_o3_exec.cc
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fast_cpu_exec.cc
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simple_cpu_exec.cc
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full_cpu_exec.cc
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decoder.hh
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''')
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# Convert to File node to fix path
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isa_parser = File('isa_parser.py')
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cpu_models_file = File('#m5/cpu/cpu_models.py')
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# This sucks in the defintions of the CpuModel objects.
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execfile(cpu_models_file.srcnode().abspath)
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# Several files are generated from the ISA description.
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# We always get the basic decoder and header file.
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isa_desc_gen_files = Split('decoder.cc decoder.hh')
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# We also get an execute file for each selected CPU model.
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isa_desc_gen_files += [CpuModel.dict[cpu].filename
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for cpu in env['CPU_MODELS']]
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# The emitter patches up the sources & targets to include the
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# autogenerated files as targets and isa parser itself as a source.
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def isa_desc_emitter(target, source, env):
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return (isa_desc_gen_files, [isa_parser] + source)
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return (isa_desc_gen_files, [isa_parser, cpu_models_file] + source)
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# Pieces are in place, so create the builder.
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isa_desc_builder = Builder(action='${SOURCES[0]} ${SOURCES[1]} $TARGET.dir',
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isa_desc_builder = Builder(action='$SOURCES $TARGET.dir $CPU_MODELS',
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source_scanner = iscan,
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emitter = isa_desc_emitter)
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@ -712,43 +712,6 @@ yacc.yacc()
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#
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#####################################################################
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################
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# CpuModel class
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#
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# The CpuModel class encapsulates everything we need to know about a
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# particular CPU model.
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class CpuModel:
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# List of all CPU models. Accessible as CpuModel.list.
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list = []
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# Constructor. Automatically adds models to CpuModel.list.
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def __init__(self, name, filename, includes, strings):
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self.name = name
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self.filename = filename # filename for output exec code
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self.includes = includes # include files needed in exec file
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# The 'strings' dict holds all the per-CPU symbols we can
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# substitute into templates etc.
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self.strings = strings
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# Add self to list.
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CpuModel.list.append(self)
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# Define CPU models. The following lines should contain the only
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# CPU-model-specific information in this file. Note that the ISA
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# description itself should have *no* CPU-model-specific content.
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CpuModel('SimpleCPU', 'simple_cpu_exec.cc',
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'#include "cpu/simple/cpu.hh"',
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{ 'CPU_exec_context': 'SimpleCPU' })
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CpuModel('FastCPU', 'fast_cpu_exec.cc',
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'#include "cpu/fast/cpu.hh"',
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{ 'CPU_exec_context': 'FastCPU' })
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CpuModel('FullCPU', 'full_cpu_exec.cc',
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'#include "encumbered/cpu/full/dyn_inst.hh"',
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{ 'CPU_exec_context': 'DynInst' })
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CpuModel('AlphaFullCPU', 'alpha_o3_exec.cc',
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'#include "cpu/o3/alpha_dyn_inst.hh"',
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{ 'CPU_exec_context': 'AlphaDynInst<AlphaSimpleImpl>' })
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# Expand template with CPU-specific references into a dictionary with
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# an entry for each CPU model name. The entry key is the model name
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# and the corresponding value is the template with the CPU-specific
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@ -757,7 +720,7 @@ def expand_cpu_symbols_to_dict(template):
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# Protect '%'s that don't go with CPU-specific terms
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t = re.sub(r'%(?!\(CPU_)', '%%', template)
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result = {}
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for cpu in CpuModel.list:
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for cpu in cpu_models:
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result[cpu.name] = t % cpu.strings
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return result
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@ -816,7 +779,7 @@ class GenCode:
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# concatenates all the individual strings in the operands.
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def __add__(self, other):
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exec_output = {}
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for cpu in CpuModel.list:
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for cpu in cpu_models:
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n = cpu.name
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exec_output[n] = self.exec_output[n] + other.exec_output[n]
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return GenCode(self.header_output + other.header_output,
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@ -830,7 +793,7 @@ class GenCode:
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self.header_output = pre + self.header_output
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self.decoder_output = pre + self.decoder_output
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self.decode_block = pre + self.decode_block
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for cpu in CpuModel.list:
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for cpu in cpu_models:
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self.exec_output[cpu.name] = pre + self.exec_output[cpu.name]
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# Wrap the decode block in a pair of strings (e.g., 'case foo:'
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@ -1789,7 +1752,7 @@ def parse_isa_desc(isa_desc_file, output_dir):
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update_if_needed(output_dir + '/decoder.cc', file_template % vars())
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# generate per-cpu exec files
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for cpu in CpuModel.list:
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for cpu in cpu_models:
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includes = '#include "decoder.hh"\n'
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includes += cpu.includes
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global_output = global_code.exec_output[cpu.name]
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update_if_needed(output_dir + '/' + cpu.filename,
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file_template % vars())
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# global list of CpuModel objects (see cpu_models.py)
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cpu_models = []
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# Called as script: get args from command line.
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# Args are: <path to cpu_models.py> <isa desc file> <output dir> <cpu models>
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if __name__ == '__main__':
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parse_isa_desc(sys.argv[1], sys.argv[2])
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execfile(sys.argv[1]) # read in CpuModel definitions
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cpu_models = [CpuModel.dict[cpu] for cpu in sys.argv[4:]]
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parse_isa_desc(sys.argv[2], sys.argv[3])
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@ -221,6 +221,9 @@ env = conf.Finish()
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# Define the universe of supported ISAs
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env['ALL_ISA_LIST'] = ['alpha', 'sparc', 'mips']
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# Define the universe of supported CPU models
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env['ALL_CPU_LIST'] = ['SimpleCPU', 'FastCPU', 'FullCPU', 'AlphaFullCPU']
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# Sticky options get saved in the options file so they persist from
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# one invocation to the next (unless overridden, in which case the new
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# value becomes sticky).
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@ -251,6 +254,12 @@ sticky_opts.AddOptions(
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# Non-sticky options only apply to the current build.
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nonsticky_opts = Options(args=ARGUMENTS)
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nonsticky_opts.AddOptions(
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# This really should be a sticky option, but there's a bug in
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# scons 0.96.1 that causes ListOptions not to be able to be
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# restored from a saved option file. It looks like this is fixed
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# in 0.96.9, but there's a different bug in that version that means we
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# can't just upgrade.
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ListOption('CPU_MODELS', 'CPU models', 'all', env['ALL_CPU_LIST']),
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BoolOption('update_ref', 'Update test reference outputs', False)
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)
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99
cpu/SConscript
Normal file
99
cpu/SConscript
Normal file
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@ -0,0 +1,99 @@
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# -*- mode:python -*-
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# Copyright (c) 2006 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
|
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# modification, are permitted provided that the following conditions are
|
||||
# met: redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer;
|
||||
# redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution;
|
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# neither the name of the copyright holders nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from
|
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# this software without specific prior written permission.
|
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
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import os
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import os.path
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# Import build environment variable from SConstruct.
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Import('env')
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models_db = File('cpu_models.py')
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execfile(models_db.srcnode().abspath)
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exec_sig_template = '''
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virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
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'''
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def gen_cpu_exec_signatures(target, source, env):
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f = open(str(target[0]), 'w')
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print >> f, '''
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#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
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#define __CPU_STATIC_INST_EXEC_SIGS_HH__
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'''
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for cpu in env['CPU_MODELS']:
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xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
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print >> f, exec_sig_template % xc_type
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print >> f, '''
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#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__
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'''
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env.Command('static_inst_exec_sigs.hh', models_db, gen_cpu_exec_signatures)
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sources = []
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if 'SimpleCPU' in env['CPU_MODELS']:
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sources += Split('simple/cpu.cc')
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if 'FastCPU' in env['CPU_MODELS']:
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sources += Split('fast/cpu.cc')
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if 'AlphaFullCPU' in env['CPU_MODELS']:
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sources += Split('''
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o3/2bit_local_pred.cc
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o3/alpha_dyn_inst.cc
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||||
o3/alpha_cpu.cc
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||||
o3/alpha_cpu_builder.cc
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||||
o3/bpred_unit.cc
|
||||
o3/btb.cc
|
||||
o3/commit.cc
|
||||
o3/decode.cc
|
||||
o3/fetch.cc
|
||||
o3/free_list.cc
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||||
o3/cpu.cc
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||||
o3/iew.cc
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||||
o3/inst_queue.cc
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||||
o3/ldstq.cc
|
||||
o3/mem_dep_unit.cc
|
||||
o3/ras.cc
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||||
o3/rename.cc
|
||||
o3/rename_map.cc
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o3/rob.cc
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o3/sat_counter.cc
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o3/store_set.cc
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o3/tournament_pred.cc
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''')
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# FullCPU sources are included from m5/SConscript since they're not
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# below this point in the file hierarchy.
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# Convert file names to SCons File objects. This takes care of the
|
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# path relative to the top of the directory tree.
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sources = [File(s) for s in sources]
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Return('sources')
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|
71
cpu/cpu_models.py
Normal file
71
cpu/cpu_models.py
Normal file
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@ -0,0 +1,71 @@
|
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# Copyright (c) 2003-2006 The Regents of The University of Michigan
|
||||
# All rights reserved.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions are
|
||||
# met: redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer;
|
||||
# redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution;
|
||||
# neither the name of the copyright holders nor the names of its
|
||||
# contributors may be used to endorse or promote products derived from
|
||||
# this software without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
################
|
||||
# CpuModel class
|
||||
#
|
||||
# The CpuModel class encapsulates everything the ISA parser needs to
|
||||
# know about a particular CPU model.
|
||||
|
||||
class CpuModel:
|
||||
# Dict of available CPU model objects. Accessible as CpuModel.dict.
|
||||
dict = {}
|
||||
|
||||
# Constructor. Automatically adds models to CpuModel.dict.
|
||||
def __init__(self, name, filename, includes, strings):
|
||||
self.name = name
|
||||
self.filename = filename # filename for output exec code
|
||||
self.includes = includes # include files needed in exec file
|
||||
# The 'strings' dict holds all the per-CPU symbols we can
|
||||
# substitute into templates etc.
|
||||
self.strings = strings
|
||||
# Add self to dict
|
||||
CpuModel.dict[name] = self
|
||||
|
||||
|
||||
#
|
||||
# Define CPU models.
|
||||
#
|
||||
# Parameters are:
|
||||
# - name of model
|
||||
# - filename for generated ISA execution file
|
||||
# - includes needed for generated ISA execution file
|
||||
# - substitution strings for ISA description templates
|
||||
#
|
||||
|
||||
CpuModel('SimpleCPU', 'simple_cpu_exec.cc',
|
||||
'#include "cpu/simple/cpu.hh"',
|
||||
{ 'CPU_exec_context': 'SimpleCPU' })
|
||||
CpuModel('FastCPU', 'fast_cpu_exec.cc',
|
||||
'#include "cpu/fast/cpu.hh"',
|
||||
{ 'CPU_exec_context': 'FastCPU' })
|
||||
CpuModel('FullCPU', 'full_cpu_exec.cc',
|
||||
'#include "encumbered/cpu/full/dyn_inst.hh"',
|
||||
{ 'CPU_exec_context': 'DynInst' })
|
||||
CpuModel('AlphaFullCPU', 'alpha_o3_exec.cc',
|
||||
'#include "cpu/o3/alpha_dyn_inst.hh"',
|
||||
{ 'CPU_exec_context': 'AlphaDynInst<AlphaSimpleImpl>' })
|
||||
|
|
@ -314,7 +314,11 @@ class StaticInst : public StaticInstBase
|
|||
delete cachedDisassembly;
|
||||
}
|
||||
|
||||
#include "static_inst_impl.hh"
|
||||
/**
|
||||
* The execute() signatures are auto-generated by scons based on the
|
||||
* set of CPU models we are compiling in today.
|
||||
*/
|
||||
#include "cpu/static_inst_exec_sigs.hh"
|
||||
|
||||
/**
|
||||
* Return the target address for a PC-relative branch.
|
||||
|
|
Loading…
Reference in a new issue