Fixes to cache eliminating the assumption that the Packet is still valid after sending out a request.
Still need to rework upgrades into this system, but works for now. src/mem/cache/base_cache.cc: Re order code to be more readable src/mem/cache/base_cache.hh: Be sure to delete the copy on a bus block src/mem/cache/cache_impl.hh: Be sure to remove the copy on a writeback success src/mem/cache/miss/mshr_queue.cc: Demorgans to make it easier to understand src/mem/tport.cc: Delete writebacks --HG-- extra : convert_revision : 9519fb37b46ead781d340de29bb342a322a6a92e
This commit is contained in:
parent
6e8bfa4e63
commit
4fff6d4603
5 changed files with 43 additions and 10 deletions
18
src/mem/cache/base_cache.cc
vendored
18
src/mem/cache/base_cache.cc
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@ -179,16 +179,23 @@ BaseCache::CachePort::recvRetry()
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return;
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}
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pkt = cache->getPacket();
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MSHR* mshr = (MSHR*)pkt->senderState;
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MSHR* mshr = (MSHR*) pkt->senderState;
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//Copy the packet, it may be modified/destroyed elsewhere
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Packet * copyPkt = new Packet(*pkt);
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copyPkt->dataStatic<uint8_t>(pkt->getPtr<uint8_t>());
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mshr->pkt = copyPkt;
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bool success = sendTiming(pkt);
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DPRINTF(Cache, "Address %x was %s in sending the timing request\n",
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pkt->getAddr(), success ? "succesful" : "unsuccesful");
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cache->sendResult(pkt, mshr, success);
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waitingOnRetry = !success;
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if (waitingOnRetry) {
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DPRINTF(CachePort, "%s now waiting on a retry\n", name());
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}
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cache->sendResult(pkt, mshr, success);
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if (success && cache->doMasterRequest())
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{
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DPRINTF(CachePort, "%s has more requests\n", name());
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@ -301,10 +308,13 @@ BaseCache::CacheEvent::process()
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bool success = cachePort->sendTiming(pkt);
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DPRINTF(Cache, "Address %x was %s in sending the timing request\n",
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pkt->getAddr(), success ? "succesful" : "unsuccesful");
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cachePort->cache->sendResult(pkt, mshr, success);
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cachePort->waitingOnRetry = !success;
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if (cachePort->waitingOnRetry)
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if (cachePort->waitingOnRetry) {
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DPRINTF(CachePort, "%s now waiting on a retry\n", cachePort->name());
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}
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cachePort->cache->sendResult(pkt, mshr, success);
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if (success && cachePort->cache->doMasterRequest())
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{
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DPRINTF(CachePort, "%s still more MSHR requests to send\n",
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10
src/mem/cache/base_cache.hh
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10
src/mem/cache/base_cache.hh
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@ -525,10 +525,13 @@ class BaseCache : public MemObject
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reqCpu->schedule(time);
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}
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else {
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if (pkt->cmd == Packet::Writeback) delete pkt->req;
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if (pkt->cmd != Packet::UpgradeReq)
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{
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delete pkt->req;
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delete pkt;
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}
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}
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}
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/**
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* Send a reponse to the slave interface and calculate miss latency.
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@ -545,10 +548,13 @@ class BaseCache : public MemObject
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reqCpu->schedule(time);
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}
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else {
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if (pkt->cmd == Packet::Writeback) delete pkt->req;
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if (pkt->cmd != Packet::UpgradeReq)
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{
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delete pkt->req;
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delete pkt;
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}
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}
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}
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/**
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* Suppliess the data if cache to cache transfers are enabled.
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12
src/mem/cache/cache_impl.hh
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12
src/mem/cache/cache_impl.hh
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@ -273,9 +273,14 @@ void
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Cache<TagStore,Buffering,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr, bool success)
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{
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if (success && !(pkt && (pkt->flags & NACKED_LINE))) {
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if (!mshr->pkt->needsResponse() && !(mshr->pkt->cmd == Packet::UpgradeReq)
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&& (pkt && (pkt->flags & SATISFIED))) {
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//Writeback, clean up the non copy version of the packet
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delete pkt;
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}
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missQueue->markInService(mshr->pkt, mshr);
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//Temp Hack for UPGRADES
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if (mshr->pkt->cmd == Packet::UpgradeReq) {
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if (mshr->pkt && mshr->pkt->cmd == Packet::UpgradeReq) {
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assert(pkt); //Upgrades need to be fixed
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pkt->flags &= ~CACHE_LINE_FILL;
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BlkType *blk = tags->findBlock(pkt);
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@ -295,6 +300,11 @@ Cache<TagStore,Buffering,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr, bool
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pkt->flags &= ~NACKED_LINE;
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pkt->flags &= ~SATISFIED;
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pkt->flags &= ~SNOOP_COMMIT;
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//Rmove copy from mshr
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delete mshr->pkt;
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mshr->pkt = pkt;
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missQueue->restoreOrigCmd(pkt);
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}
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}
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2
src/mem/cache/miss/mshr_queue.cc
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2
src/mem/cache/miss/mshr_queue.cc
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@ -213,7 +213,7 @@ void
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MSHRQueue::markInService(MSHR* mshr)
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{
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//assert(mshr == pendingList.front());
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if (!(mshr->pkt->needsResponse() || mshr->pkt->cmd == Packet::UpgradeReq)) {
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if (!mshr->pkt->needsResponse() && !(mshr->pkt->cmd == Packet::UpgradeReq)) {
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assert(mshr->getNumTargets() == 0);
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if ((mshr->pkt->flags & SATISFIED) && (mshr->pkt->cmd == Packet::Writeback)) {
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//Writeback hit, so delete it
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@ -66,6 +66,13 @@ SimpleTimingPort::recvTiming(Packet *pkt)
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pkt->makeTimingResponse();
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sendTimingLater(pkt, latency);
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}
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else {
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if (pkt->cmd != Packet::UpgradeReq)
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{
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delete pkt->req;
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delete pkt;
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}
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}
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return true;
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}
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