Config: corrects the way Ruby attaches to the DMA ports

With recent changes to the memory system, a port cannot be assigned a peer
port twice. While making use of the Ruby memory system in FS mode, DMA
ports were assigned peer twice, once for the classic memory system
and once for the Ruby memory system. This patch removes this double
assignment of peer ports.
This commit is contained in:
Nilay Vaish 2012-04-05 11:09:19 -05:00
parent f1a6090613
commit 4f4a710457
12 changed files with 36 additions and 55 deletions

View file

@ -134,16 +134,14 @@ def makeLinuxAlphaRubySystem(mem_mode, mdesc = None):
self.tsunami.attachIO(self.piobus) self.tsunami.attachIO(self.piobus)
self.tsunami.ide.pio = self.piobus.master self.tsunami.ide.pio = self.piobus.master
self.tsunami.ide.config = self.piobus.master self.tsunami.ide.config = self.piobus.master
self.tsunami.ide.dma = self.piobus.slave
self.tsunami.ethernet.pio = self.piobus.master self.tsunami.ethernet.pio = self.piobus.master
self.tsunami.ethernet.config = self.piobus.master self.tsunami.ethernet.config = self.piobus.master
self.tsunami.ethernet.dma = self.piobus.slave
# #
# Store the dma devices for later connection to dma ruby ports. # Store the dma devices for later connection to dma ruby ports.
# Append an underscore to dma_devices to avoid the SimObjectVector check. # Append an underscore to dma_devices to avoid the SimObjectVector check.
# #
self._dma_devices = [self.tsunami.ide, self.tsunami.ethernet] self._dma_ports = [self.tsunami.ide.dma, self.tsunami.ethernet.dma]
self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(), self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
read_only = True)) read_only = True))
@ -408,8 +406,10 @@ def connectX86RubySystem(x86_sys):
# the piobus a direct connection to physical memory # the piobus a direct connection to physical memory
# #
x86_sys.piobus.master = x86_sys.physmem.port x86_sys.piobus.master = x86_sys.physmem.port
# add the ide to the list of dma devices that later need to attach to
x86_sys.pc.attachIO(x86_sys.piobus) # dma controllers
x86_sys._dma_ports = [x86_sys.pc.south_bridge.ide.dma]
x86_sys.pc.attachIO(x86_sys.piobus, x86_sys._dma_ports)
def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None, Ruby = False): def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None, Ruby = False):
@ -432,9 +432,6 @@ def makeX86System(mem_mode, numCPUs = 1, mdesc = None, self = None, Ruby = False
# Create and connect the busses required by each memory system # Create and connect the busses required by each memory system
if Ruby: if Ruby:
connectX86RubySystem(self) connectX86RubySystem(self)
# add the ide to the list of dma devices that later need to attach to
# dma controllers
self._dma_devices = [self.pc.south_bridge.ide]
else: else:
connectX86ClassicSystem(self, numCPUs) connectX86ClassicSystem(self, numCPUs)

View file

@ -96,7 +96,7 @@ if options.script is not None:
system.readfile = options.script system.readfile = options.script
system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)] system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)]
Ruby.create_system(options, system, system.piobus, system._dma_devices) Ruby.create_system(options, system, system.piobus, system._dma_ports)
for (i, cpu) in enumerate(system.cpu): for (i, cpu) in enumerate(system.cpu):
# #

View file

@ -115,13 +115,17 @@ if options.num_dmas > 0:
percent_functional = 0, percent_functional = 0,
percent_uncacheable = 0, percent_uncacheable = 0,
progress_interval = options.progress, progress_interval = options.progress,
warn_on_failure = options.warn_on_failure) \ suppress_func_warnings =
not options.suppress_func_warnings) \
for i in xrange(options.num_dmas) ] for i in xrange(options.num_dmas) ]
system.dma_devices = dmas system.dma_devices = dmas
else: else:
dmas = [] dmas = []
Ruby.create_system(options, system, dma_devices = dmas) dma_ports = []
for (i, dma) in enumerate(dmas):
dma_ports.append(dma.test)
Ruby.create_system(options, system, dma_ports = dma_ports)
# #
# The tester is most effective when randomization is turned on and # The tester is most effective when randomization is turned on and

View file

@ -47,7 +47,7 @@ class L2Cache(RubyCache):
def define_options(parser): def define_options(parser):
return return
def create_system(options, system, piobus, dma_devices, ruby_system): def create_system(options, system, piobus, dma_ports, ruby_system):
if buildEnv['PROTOCOL'] != 'MESI_CMP_directory': if buildEnv['PROTOCOL'] != 'MESI_CMP_directory':
panic("This script requires the MESI_CMP_directory protocol to be built.") panic("This script requires the MESI_CMP_directory protocol to be built.")
@ -162,7 +162,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
cntrl_count += 1 cntrl_count += 1
for i, dma_device in enumerate(dma_devices): for i, dma_port in enumerate(dma_ports):
# #
# Create the Ruby objects associated with the dma controller # Create the Ruby objects associated with the dma controller
# #
@ -175,12 +175,8 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
ruby_system = ruby_system) ruby_system = ruby_system)
exec("system.dma_cntrl%d = dma_cntrl" % i) exec("system.dma_cntrl%d = dma_cntrl" % i)
if dma_device.type == 'MemTest': exec("system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.test" % i)
else:
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.dma" % i)
dma_cntrl_nodes.append(dma_cntrl) dma_cntrl_nodes.append(dma_cntrl)
cntrl_count += 1 cntrl_count += 1
all_cntrls = l1_cntrl_nodes + \ all_cntrls = l1_cntrl_nodes + \

View file

@ -41,7 +41,7 @@ class Cache(RubyCache):
def define_options(parser): def define_options(parser):
return return
def create_system(options, system, piobus, dma_devices, ruby_system): def create_system(options, system, piobus, dma_ports, ruby_system):
if buildEnv['PROTOCOL'] != 'MI_example': if buildEnv['PROTOCOL'] != 'MI_example':
panic("This script requires the MI_example protocol to be built.") panic("This script requires the MI_example protocol to be built.")
@ -135,7 +135,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
cntrl_count += 1 cntrl_count += 1
for i, dma_device in enumerate(dma_devices): for i, dma_port in enumerate(dma_ports):
# #
# Create the Ruby objects associated with the dma controller # Create the Ruby objects associated with the dma controller
# #
@ -148,13 +148,8 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
ruby_system = ruby_system) ruby_system = ruby_system)
exec("system.dma_cntrl%d = dma_cntrl" % i) exec("system.dma_cntrl%d = dma_cntrl" % i)
if dma_device.type == 'MemTest': exec("system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.test" % i)
else:
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.dma" % i)
dma_cntrl.dma_sequencer.slave = dma_device.dma
dma_cntrl_nodes.append(dma_cntrl) dma_cntrl_nodes.append(dma_cntrl)
cntrl_count += 1 cntrl_count += 1
all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes all_cntrls = l1_cntrl_nodes + dir_cntrl_nodes + dma_cntrl_nodes

View file

@ -47,7 +47,7 @@ class L2Cache(RubyCache):
def define_options(parser): def define_options(parser):
return return
def create_system(options, system, piobus, dma_devices, ruby_system): def create_system(options, system, piobus, dma_ports, ruby_system):
if buildEnv['PROTOCOL'] != 'MOESI_CMP_directory': if buildEnv['PROTOCOL'] != 'MOESI_CMP_directory':
panic("This script requires the MOESI_CMP_directory protocol to be built.") panic("This script requires the MOESI_CMP_directory protocol to be built.")
@ -159,7 +159,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
cntrl_count += 1 cntrl_count += 1
for i, dma_device in enumerate(dma_devices): for i, dma_port in enumerate(dma_ports):
# #
# Create the Ruby objects associated with the dma controller # Create the Ruby objects associated with the dma controller
# #
@ -172,12 +172,8 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
ruby_system = ruby_system) ruby_system = ruby_system)
exec("system.dma_cntrl%d = dma_cntrl" % i) exec("system.dma_cntrl%d = dma_cntrl" % i)
if dma_device.type == 'MemTest': exec("system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.test" % i)
else:
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.dma" % i)
dma_cntrl_nodes.append(dma_cntrl) dma_cntrl_nodes.append(dma_cntrl)
cntrl_count += 1 cntrl_count += 1
all_cntrls = l1_cntrl_nodes + \ all_cntrls = l1_cntrl_nodes + \

View file

@ -54,7 +54,7 @@ def define_options(parser):
parser.add_option("--allow-atomic-migration", action="store_true", parser.add_option("--allow-atomic-migration", action="store_true",
help="allow migratory sharing for atomic only accessed blocks") help="allow migratory sharing for atomic only accessed blocks")
def create_system(options, system, piobus, dma_devices, ruby_system): def create_system(options, system, piobus, dma_ports, ruby_system):
if buildEnv['PROTOCOL'] != 'MOESI_CMP_token': if buildEnv['PROTOCOL'] != 'MOESI_CMP_token':
panic("This script requires the MOESI_CMP_token protocol to be built.") panic("This script requires the MOESI_CMP_token protocol to be built.")
@ -183,7 +183,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
cntrl_count += 1 cntrl_count += 1
for i, dma_device in enumerate(dma_devices): for i, dma_port in enumerate(dma_ports):
# #
# Create the Ruby objects associated with the dma controller # Create the Ruby objects associated with the dma controller
# #
@ -196,12 +196,8 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
ruby_system = ruby_system) ruby_system = ruby_system)
exec("system.dma_cntrl%d = dma_cntrl" % i) exec("system.dma_cntrl%d = dma_cntrl" % i)
if dma_device.type == 'MemTest': exec("system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.test" % i)
else:
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.dma" % i)
dma_cntrl_nodes.append(dma_cntrl) dma_cntrl_nodes.append(dma_cntrl)
cntrl_count += 1 cntrl_count += 1
all_cntrls = l1_cntrl_nodes + \ all_cntrls = l1_cntrl_nodes + \

View file

@ -58,7 +58,7 @@ def define_options(parser):
parser.add_option("--dir-on", action="store_true", parser.add_option("--dir-on", action="store_true",
help="Hammer: enable Full-bit Directory") help="Hammer: enable Full-bit Directory")
def create_system(options, system, piobus, dma_devices, ruby_system): def create_system(options, system, piobus, dma_ports, ruby_system):
if buildEnv['PROTOCOL'] != 'MOESI_hammer': if buildEnv['PROTOCOL'] != 'MOESI_hammer':
panic("This script requires the MOESI_hammer protocol to be built.") panic("This script requires the MOESI_hammer protocol to be built.")
@ -195,7 +195,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
cntrl_count += 1 cntrl_count += 1
for i, dma_device in enumerate(dma_devices): for i, dma_port in enumerate(dma_ports):
# #
# Create the Ruby objects associated with the dma controller # Create the Ruby objects associated with the dma controller
# #
@ -208,10 +208,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
ruby_system = ruby_system) ruby_system = ruby_system)
exec("system.dma_cntrl%d = dma_cntrl" % i) exec("system.dma_cntrl%d = dma_cntrl" % i)
if dma_device.type == 'MemTest': exec("system.dma_cntrl%d.dma_sequencer.slave = dma_port" % i)
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.test" % i)
else:
exec("system.dma_cntrl%d.dma_sequencer.slave = dma_device.dma" % i)
dma_cntrl_nodes.append(dma_cntrl) dma_cntrl_nodes.append(dma_cntrl)
if options.recycle_latency: if options.recycle_latency:

View file

@ -41,7 +41,7 @@ class Cache(RubyCache):
def define_options(parser): def define_options(parser):
return return
def create_system(options, system, piobus, dma_devices, ruby_system): def create_system(options, system, piobus, dma_ports, ruby_system):
if buildEnv['PROTOCOL'] != 'Network_test': if buildEnv['PROTOCOL'] != 'Network_test':
panic("This script requires the Network_test protocol to be built.") panic("This script requires the Network_test protocol to be built.")
@ -52,7 +52,7 @@ def create_system(options, system, piobus, dma_devices, ruby_system):
# The Garnet tester protocol does not support fs nor dma # The Garnet tester protocol does not support fs nor dma
# #
assert(piobus == None) assert(piobus == None)
assert(dma_devices == []) assert(dma_ports == [])
# #
# The ruby network creation expects the list of nodes in the system to be # The ruby network creation expects the list of nodes in the system to be

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@ -76,7 +76,7 @@ def define_options(parser):
exec "import %s" % protocol exec "import %s" % protocol
eval("%s.define_options(parser)" % protocol) eval("%s.define_options(parser)" % protocol)
def create_system(options, system, piobus = None, dma_devices = []): def create_system(options, system, piobus = None, dma_ports = []):
system.ruby = RubySystem(clock = options.clock, system.ruby = RubySystem(clock = options.clock,
stats_filename = options.ruby_stats, stats_filename = options.ruby_stats,
@ -87,8 +87,7 @@ def create_system(options, system, piobus = None, dma_devices = []):
exec "import %s" % protocol exec "import %s" % protocol
try: try:
(cpu_sequencers, dir_cntrls, all_cntrls) = \ (cpu_sequencers, dir_cntrls, all_cntrls) = \
eval("%s.create_system(options, system, piobus, \ eval("%s.create_system(options, system, piobus, dma_ports, ruby)"
dma_devices, ruby)" \
% protocol) % protocol)
except: except:
print "Error: could not create sytem for ruby protocol %s" % protocol print "Error: could not create sytem for ruby protocol %s" % protocol

View file

@ -69,8 +69,8 @@ class Pc(Platform):
# A device to catch accesses to the non-existant floppy controller. # A device to catch accesses to the non-existant floppy controller.
fake_floppy = IsaFake(pio_addr=x86IOAddress(0x3f2), pio_size=2) fake_floppy = IsaFake(pio_addr=x86IOAddress(0x3f2), pio_size=2)
def attachIO(self, bus): def attachIO(self, bus, dma_ports = []):
self.south_bridge.attachIO(bus) self.south_bridge.attachIO(bus, dma_ports)
self.i_dont_exist.pio = bus.master self.i_dont_exist.pio = bus.master
self.behind_pci.pio = bus.master self.behind_pci.pio = bus.master
self.com_1.pio = bus.master self.com_1.pio = bus.master

View file

@ -85,7 +85,7 @@ class SouthBridge(SimObject):
ide.InterruptLine = 14 ide.InterruptLine = 14
ide.InterruptPin = 1 ide.InterruptPin = 1
def attachIO(self, bus): def attachIO(self, bus, dma_ports):
# Route interupt signals # Route interupt signals
self.int_lines = \ self.int_lines = \
[X86IntLine(source=self.pic1.output, sink=self.io_apic.pin(0)), [X86IntLine(source=self.pic1.output, sink=self.io_apic.pin(0)),
@ -106,7 +106,8 @@ class SouthBridge(SimObject):
self.dma1.pio = bus.master self.dma1.pio = bus.master
self.ide.pio = bus.master self.ide.pio = bus.master
self.ide.config = bus.master self.ide.config = bus.master
self.ide.dma = bus.slave if dma_ports.count(self.ide.dma) == 0:
self.ide.dma = bus.slave
self.keyboard.pio = bus.master self.keyboard.pio = bus.master
self.pic1.pio = bus.master self.pic1.pio = bus.master
self.pic2.pio = bus.master self.pic2.pio = bus.master