ARM: Improve memory instruction disassembly.
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2fb8d481ab
commit
4eb18cc07a
3 changed files with 78 additions and 20 deletions
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@ -37,14 +37,17 @@ Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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{
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std::stringstream ss;
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std::stringstream ss;
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printMnemonic(ss);
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printMnemonic(ss);
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return ss.str();
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printReg(ss, machInst.rd);
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}
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ss << ", [";
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printReg(ss, machInst.rn);
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std::string
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ss << ", ";
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MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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if (machInst.puswl.prepost == 1)
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{
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printOffset(ss);
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std::stringstream ss;
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ss << "]";
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printMnemonic(ss);
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if (machInst.puswl.prepost == 0)
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printOffset(ss);
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else if (machInst.puswl.writeback)
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ss << "!";
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return ss.str();
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return ss.str();
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}
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}
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}
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}
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@ -65,23 +65,75 @@ class Memory : public PredOp
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std::string
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std::string
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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virtual void
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printOffset(std::ostream &os) const
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{}
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};
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};
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/**
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class MemoryDisp : public Memory
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* Base class for a few miscellaneous memory-format insts
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* that don't interpret the disp field
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*/
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class MemoryNoDisp : public Memory
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{
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{
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protected:
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protected:
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/// Constructor
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/// Constructor
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MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
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MemoryDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
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: Memory(mnem, _machInst, __opClass)
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: Memory(mnem, _machInst, __opClass)
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{
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{
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}
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}
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std::string
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void
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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printOffset(std::ostream &os) const
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{
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ccprintf(os, "#%#x", (machInst.puswl.up ? disp : -disp));
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}
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};
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class MemoryHilo : public Memory
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{
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protected:
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/// Constructor
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MemoryHilo(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
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: Memory(mnem, _machInst, __opClass)
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{
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}
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void
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printOffset(std::ostream &os) const
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{
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ccprintf(os, "#%#x", (machInst.puswl.up ? hilo : -hilo));
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}
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};
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class MemoryShift : public Memory
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{
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protected:
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/// Constructor
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MemoryShift(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
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: Memory(mnem, _machInst, __opClass)
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{
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}
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void
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printOffset(std::ostream &os) const
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{
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printShiftOperand(os);
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}
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};
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class MemoryReg : public Memory
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{
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protected:
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/// Constructor
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MemoryReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
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: Memory(mnem, _machInst, __opClass)
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{
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}
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void
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printOffset(std::ostream &os) const
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{
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os << (machInst.puswl.up ? "+ " : "- ");
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printReg(os, machInst.rm);
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}
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};
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};
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}
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}
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@ -276,11 +276,12 @@ let {{
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# Here's where we'll tack on a flag to make this a usermode access.
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# Here's where we'll tack on a flag to make this a usermode access.
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mnem += "t"
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mnem += "t"
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type = ("Store", "Load")[l]
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type = ("Store", "Load")[l]
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suffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w)
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newSuffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w)
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if b == 1:
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if b == 1:
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mnem += "b"
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mnem += "b"
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return LoadStoreBase(mnem, mnem.capitalize() + suffix,
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return LoadStoreBase(mnem, mnem.capitalize() + newSuffix,
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ea_code, code, mem_flags = [], inst_flags = [],
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ea_code, code, mem_flags = [], inst_flags = [],
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base_class = 'Memory' + suffix,
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exec_template_base = type.capitalize())
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exec_template_base = type.capitalize())
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def buildMode3Inst(p, u, i, w, type, code, mnem):
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def buildMode3Inst(p, u, i, w, type, code, mnem):
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@ -289,9 +290,11 @@ let {{
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ea_code = "EA = Rn %s;" % ("", offset)[p]
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ea_code = "EA = Rn %s;" % ("", offset)[p]
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if p == 0 or w == 1:
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if p == 0 or w == 1:
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code += "Rn = Rn %s;" % offset
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code += "Rn = Rn %s;" % offset
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suffix = "_P%dU%dI%dW%d" % (p, u, i, w)
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newSuffix = "_P%dU%dI%dW%d" % (p, u, i, w)
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return LoadStoreBase(mnem, mnem.capitalize() + suffix,
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suffix = ("Reg", "Hilo")[i]
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return LoadStoreBase(mnem, mnem.capitalize() + newSuffix,
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ea_code, code, mem_flags = [], inst_flags = [],
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ea_code, code, mem_flags = [], inst_flags = [],
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base_class = 'Memory' + suffix,
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exec_template_base = type.capitalize())
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exec_template_base = type.capitalize())
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}};
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}};
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