Add caches in, fix cpu.mem param
--HG-- extra : convert_revision : 486283d83786807c72bb4601e4b9613b55d8802c
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2b70b74c9b
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4e3164617a
6 changed files with 8 additions and 2 deletions
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@ -34,5 +34,6 @@ system = System(cpu = AtomicSimpleCPU(),
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membus = Bus())
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membus = Bus())
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system.physmem.port = system.membus.port
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system.physmem.port = system.membus.port
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system.cpu.connectMemPorts(system.membus)
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system.cpu.connectMemPorts(system.membus)
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system.cpu.mem = system.physmem
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root = Root(system = system)
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root = Root(system = system)
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@ -37,8 +37,9 @@ class MyCache(BaseCache):
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tgts_per_mshr = 5
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tgts_per_mshr = 5
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cpu = TimingSimpleCPU()
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cpu = TimingSimpleCPU()
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#cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'),
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cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'),
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# MyCache(size = '2MB'))
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MyCache(size = '2MB'))
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cpu.mem = cpu.dcache
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system = System(cpu = cpu,
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system = System(cpu = cpu,
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physmem = PhysicalMemory(),
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physmem = PhysicalMemory(),
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@ -39,5 +39,6 @@ system = FSConfig.makeLinuxAlphaSystem('atomic')
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system.cpu = cpus
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system.cpu = cpus
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for c in cpus:
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for c in cpus:
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c.connectMemPorts(system.membus)
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c.connectMemPorts(system.membus)
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c.mem = system.physmem
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root = Root(clock = '2GHz', system = system)
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root = Root(clock = '2GHz', system = system)
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@ -35,5 +35,6 @@ cpu = AtomicSimpleCPU()
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system = FSConfig.makeLinuxAlphaSystem('atomic')
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system = FSConfig.makeLinuxAlphaSystem('atomic')
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system.cpu = cpu
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system.cpu = cpu
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cpu.connectMemPorts(system.membus)
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cpu.connectMemPorts(system.membus)
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cpu.mem = system.physmem
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root = Root(clock = '2GHz', system = system)
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root = Root(clock = '2GHz', system = system)
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@ -39,5 +39,6 @@ system = FSConfig.makeLinuxAlphaSystem('timing')
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system.cpu = cpus
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system.cpu = cpus
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for c in cpus:
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for c in cpus:
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c.connectMemPorts(system.membus)
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c.connectMemPorts(system.membus)
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c.mem = system.physmem
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root = Root(clock = '2GHz', system = system)
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root = Root(clock = '2GHz', system = system)
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@ -35,5 +35,6 @@ cpu = TimingSimpleCPU()
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system = FSConfig.makeLinuxAlphaSystem('timing')
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system = FSConfig.makeLinuxAlphaSystem('timing')
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system.cpu = cpu
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system.cpu = cpu
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cpu.connectMemPorts(system.membus)
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cpu.connectMemPorts(system.membus)
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cpu.mem = system.physmem
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root = Root(clock = '2GHz', system = system)
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root = Root(clock = '2GHz', system = system)
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