diff --git a/src/arch/alpha/predecoder.hh b/src/arch/alpha/predecoder.hh index 4e89f53a6..650f2bfa2 100644 --- a/src/arch/alpha/predecoder.hh +++ b/src/arch/alpha/predecoder.hh @@ -33,6 +33,7 @@ #include "arch/alpha/types.hh" #include "base/misc.hh" +#include "config/full_system.hh" #include "sim/host.hh" class ThreadContext; diff --git a/src/arch/sparc/predecoder.hh b/src/arch/sparc/predecoder.hh index 71b14b020..4a8c9dc4a 100644 --- a/src/arch/sparc/predecoder.hh +++ b/src/arch/sparc/predecoder.hh @@ -33,6 +33,7 @@ #include "arch/sparc/types.hh" #include "base/misc.hh" +#include "cpu/thread_context.hh" #include "sim/host.hh" class ThreadContext; diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc index 54d8c68fa..20694b38f 100644 --- a/src/cpu/exetrace.cc +++ b/src/cpu/exetrace.cc @@ -36,6 +36,7 @@ #include #include +#include "arch/predecoder.hh" #include "arch/regfile.hh" #include "arch/utility.hh" #include "base/loader/symtab.hh" @@ -302,6 +303,7 @@ Trace::InstRecord::dump() outs << endl; } #if THE_ISA == SPARC_ISA && FULL_SYSTEM + static TheISA::Predecoder predecoder(NULL); // Compare if (IsOn(ExecLegion)) { @@ -556,9 +558,13 @@ Trace::InstRecord::dump() << staticInst->disassemble(m5Pc, debugSymbolTable) << endl; + predecoder.setTC(thread); + predecoder.moreBytes(m5Pc, 0, shared_data->instruction); + + assert(predecoder.extMachInstRead()); + StaticInstPtr legionInst = - StaticInst::decode(makeExtMI(shared_data->instruction, - thread)); + StaticInst::decode(predecoder.getExtMachInst()); outs << setfill(' ') << setw(15) << " Legion Inst: " << "0x" << setw(8) << setfill('0') << hex