add fcntl64Func
use ThreadContext rename src/arch/mips/isa/formats/branch.isa: src/arch/mips/isa/formats/fp.isa: src/arch/mips/isa/includes.isa: Use ThreadContext src/sim/syscall_emul.cc: fcntl64 function using TC src/sim/syscall_emul.hh: Add fcntl64func --HG-- extra : convert_revision : b5e2348530473704388b1c5a2b59bf78360260a9
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68e470f78a
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@ -88,7 +88,7 @@ output header {{
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{
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}
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Addr branchTarget(ExecContext *xc) const;
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Addr branchTarget(ThreadContext *tc) const;
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std::string
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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@ -103,10 +103,10 @@ output decoder {{
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}
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Addr
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Jump::branchTarget(ExecContext *xc) const
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Jump::branchTarget(ThreadContext *tc) const
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{
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Addr NPC = xc->readPC() + 4;
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uint64_t Rb = xc->readIntReg(_srcRegIdx[0]);
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Addr NPC = tc->readPC() + 4;
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uint64_t Rb = tc->readIntReg(_srcRegIdx[0]);
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return (Rb & ~3) | (NPC & 1);
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}
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@ -95,7 +95,7 @@ output exec {{
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template <class T>
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bool
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fpInvalidOp(FPOp *inst, %(CPU_exec_context)s *xc, const T dest_val,
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fpInvalidOp(FPOp *inst, %(CPU_exec_context)s *cpu, const T dest_val,
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Trace::InstRecord *traceData)
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{
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uint64_t mips_nan = 0;
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@ -111,13 +111,13 @@ output exec {{
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}
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//Set value to QNAN
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xc->setFloatRegBits(inst, 0, mips_nan, size);
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cpu->setFloatRegBits(inst, 0, mips_nan, size);
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//Read FCSR from FloatRegFile
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uint32_t fcsr_bits = xc->cpuXC->readFloatRegBits(FCSR);
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uint32_t fcsr_bits = cpu->tc->readFloatRegBits(FCSR);
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//Write FCSR from FloatRegFile
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xc->cpuXC->setFloatRegBits(FCSR, genInvalidVector(fcsr_bits));
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cpu->tc->setFloatRegBits(FCSR, genInvalidVector(fcsr_bits));
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if (traceData) { traceData->setData(mips_nan); }
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return true;
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@ -127,15 +127,15 @@ output exec {{
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}
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void
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fpResetCauseBits(%(CPU_exec_context)s *xc)
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fpResetCauseBits(%(CPU_exec_context)s *cpu)
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{
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//Read FCSR from FloatRegFile
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uint32_t fcsr = xc->cpuXC->readFloatRegBits(FCSR);
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uint32_t fcsr = cpu->tc->readFloatRegBits(FCSR);
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fcsr = bits(fcsr, 31, 18) << 18 | bits(fcsr, 11, 0);
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//Write FCSR from FloatRegFile
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xc->cpuXC->setFloatRegBits(FCSR, fcsr);
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cpu->tc->setFloatRegBits(FCSR, fcsr);
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}
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}};
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@ -18,7 +18,7 @@ output decoder {{
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#include "arch/mips/isa_traits.hh"
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#include "base/cprintf.hh"
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#include "base/loader/symtab.hh"
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#include "cpu/exec_context.hh" // for Jump::branchTarget()
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#include "cpu/thread_context.hh"
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#include "arch/mips/faults.hh"
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#include "arch/mips/isa_traits.hh"
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#include "arch/mips/utility.hh"
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@ -340,6 +340,35 @@ fcntlFunc(SyscallDesc *desc, int num, Process *process,
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}
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}
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SyscallReturn
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fcntl64Func(SyscallDesc *desc, int num, Process *process,
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ThreadContext *tc)
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{
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int fd = tc->getSyscallArg(0);
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if (fd < 0 || process->sim_fd(fd) < 0)
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return -EBADF;
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int cmd = tc->getSyscallArg(1);
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switch (cmd) {
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case 33: //F_GETLK64
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warn("fcntl64(%d, F_GETLK64) not supported, error returned\n", fd);
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return -EMFILE;
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case 34: // F_SETLK64
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case 35: // F_SETLKW64
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warn("fcntl64(%d, F_SETLK(W)64) not supported, error returned\n", fd);
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return -EMFILE;
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default:
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// not sure if this is totally valid, but we'll pass it through
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// to the underlying OS
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warn("fcntl64(%d, %d) passed through to host\n", fd, cmd);
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return fcntl(process->sim_fd(fd), cmd);
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// return 0;
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}
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}
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SyscallReturn
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pipePseudoFunc(SyscallDesc *desc, int callnum, Process *process,
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ThreadContext *tc)
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@ -249,6 +249,10 @@ SyscallReturn fchownFunc(SyscallDesc *desc, int num,
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SyscallReturn fcntlFunc(SyscallDesc *desc, int num,
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Process *process, ThreadContext *tc);
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/// Target fcntl64() handler.
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SyscallReturn fcntl64Func(SyscallDesc *desc, int num,
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Process *process, ThreadContext *tc);
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/// Target setuid() handler.
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SyscallReturn setuidFunc(SyscallDesc *desc, int num,
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Process *p, ThreadContext *tc);
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