Merge ktlim@zizzer:/bk/newmem

into  zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/clean2

--HG--
extra : convert_revision : f3d193dd1e0b82c496d8224f014123b7cb028c02

src/arch/sparc/isa/decoder.isa

@@ -1324,8 +1324,14 @@ decode OP default Unknown::unknown()
             0x05: stb({{Mem.ub = Rd.sb;}});
             0x06: sth({{Mem.uhw = Rd.shw;}});
             0x07: sttw({{
-                      (Mem.tuw).a = RdLow<31:0>;
-                      (Mem.tuw).b = RdHigh<31:0>;
+                      //This temporary needs to be here so that the parser
+                      //will correctly identify this instruction as a store.
+                      //It's probably either the parenthesis or referencing
+                      //the member variable that throws confuses it.
+                      Twin32_t temp;
+                      temp.a = RdLow<31:0>;
+                      temp.b = RdHigh<31:0>;
+                      Mem.tuw = temp;
                   }});
         }
         format Load {
@@ -1417,8 +1423,14 @@ decode OP default Unknown::unknown()
             0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}});
             0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}});
             0x17: sttwa({{
-                      (Mem.tuw).a = RdLow<31:0>;
-                      (Mem.tuw).b = RdHigh<31:0>;
+                      //This temporary needs to be here so that the parser
+                      //will correctly identify this instruction as a store.
+                      //It's probably either the parenthesis or referencing
+                      //the member variable that throws confuses it.
+                      Twin32_t temp;
+                      temp.a = RdLow<31:0>;
+                      temp.b = RdHigh<31:0>;
+                      Mem.tuw = temp;
                   }}, {{EXT_ASI}});
         }
         format LoadAlt {

tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini

@@ -0,0 +1,64 @@
+[root]
+type=Root
+children=system
+dummy=0
+
+[system]
+type=System
+children=cpu membus physmem
+mem_mode=atomic
+physmem=system.physmem
+
+[system.cpu]
+type=AtomicSimpleCPU
+children=workload
+clock=1
+cpu_id=0
+defer_registration=false
+function_trace=false
+function_trace_start=0
+max_insts_all_threads=0
+max_insts_any_thread=0
+max_loads_all_threads=0
+max_loads_any_thread=0
+phase=0
+progress_interval=0
+simulate_stalls=false
+system=system
+width=1
+workload=system.cpu.workload
+dcache_port=system.membus.port[2]
+icache_port=system.membus.port[1]
+
+[system.cpu.workload]
+type=LiveProcess
+cmd=mcf mcf.in
+cwd=build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic
+egid=100
+env=
+euid=100
+executable=/dist/m5/cpu2000/binaries/sparc/linux/mcf
+gid=100
+input=/dist/m5/cpu2000/data/mcf/lgred/input/mcf.in
+output=cout
+pid=100
+ppid=99
+system=system
+uid=100
+
+[system.membus]
+type=Bus
+bus_id=0
+clock=1000
+responder_set=false
+width=64
+port=system.physmem.port system.cpu.icache_port system.cpu.dcache_port
+
+[system.physmem]
+type=PhysicalMemory
+file=
+latency=1
+range=0:134217727
+zero=false
+port=system.membus.port[0]
+

tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.out

@@ -0,0 +1,57 @@
+[root]
+type=Root
+dummy=0
+
+[system.physmem]
+type=PhysicalMemory
+file=
+range=[0,134217727]
+latency=1
+zero=false
+
+[system]
+type=System
+physmem=system.physmem
+mem_mode=atomic
+
+[system.membus]
+type=Bus
+bus_id=0
+clock=1000
+width=64
+responder_set=false
+
+[system.cpu.workload]
+type=LiveProcess
+cmd=mcf mcf.in
+executable=/dist/m5/cpu2000/binaries/sparc/linux/mcf
+input=/dist/m5/cpu2000/data/mcf/lgred/input/mcf.in
+output=cout
+env=
+cwd=build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic
+system=system
+uid=100
+euid=100
+gid=100
+egid=100
+pid=100
+ppid=99
+
+[system.cpu]
+type=AtomicSimpleCPU
+max_insts_any_thread=0
+max_insts_all_threads=0
+max_loads_any_thread=0
+max_loads_all_threads=0
+progress_interval=0
+system=system
+cpu_id=0
+workload=system.cpu.workload
+clock=1
+phase=0
+defer_registration=false
+width=1
+function_trace=false
+function_trace_start=0
+simulate_stalls=false
+

tests/long/10.mcf/ref/sparc/linux/simple-atomic/m5stats.txt

@@ -0,0 +1,18 @@
+
+---------- Begin Simulation Statistics ----------
+host_inst_rate                                 624449                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 148644                       # Number of bytes of host memory used
+host_seconds                                  2753.78                       # Real time elapsed on the host
+host_tick_rate                                 624449                       # Simulator tick rate (ticks/s)
+sim_freq                                 1000000000000                       # Frequency of simulated ticks
+sim_insts                                  1719594534                       # Number of instructions simulated
+sim_seconds                                  0.001720                       # Number of seconds simulated
+sim_ticks                                  1719594533                       # Number of ticks simulated
+system.cpu.idle_fraction                            0                       # Percentage of idle cycles
+system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
+system.cpu.numCycles                       1719594534                       # number of cpu cycles simulated
+system.cpu.num_insts                       1719594534                       # Number of instructions executed
+system.cpu.num_refs                         774793634                       # Number of memory references
+system.cpu.workload.PROG:num_syscalls             632                       # Number of system calls
+
+---------- End Simulation Statistics   ----------

tests/long/10.mcf/ref/sparc/linux/simple-atomic/stderr

@@ -0,0 +1,7 @@
+warn: More than two loadable segments in ELF object.
+warn: Ignoring segment @ 0xa2000 length 0x10.
+warn: More than two loadable segments in ELF object.
+warn: Ignoring segment @ 0x0 length 0x0.
+0: system.remote_gdb.listener: listening for remote gdb on port 7000
+warn: Entering event queue @ 0.  Starting simulation...
+warn: Ignoring request to flush register windows.

tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout

@@ -0,0 +1,33 @@
+
+MCF SPEC version 1.6.I
+by  Andreas Loebel
+Copyright (c) 1998,1999   ZIB Berlin
+All Rights Reserved.
+
+nodes                      : 1800
+active arcs                : 8190
+simplex iterations         : 6837
+flow value                 : 12860044181
+new implicit arcs          : 300000
+active arcs                : 308190
+simplex iterations         : 11843
+flow value                 : 9360043604
+new implicit arcs          : 22787
+active arcs                : 330977
+simplex iterations         : 11931
+flow value                 : 9360043512
+checksum                   : 798014
+optimal
+M5 Simulator System
+
+Copyright (c) 2001-2006
+The Regents of The University of Michigan
+All Rights Reserved
+
+
+M5 compiled Mar 23 2007 22:37:06
+M5 started Fri Mar 23 22:37:22 2007
+M5 executing on zizzer.eecs.umich.edu
+command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/10.mcf/sparc/linux/simple-atomic tests/run.py long/10.mcf/sparc/linux/simple-atomic
+Global frequency set at 1000000000000 ticks per second
+Exiting @ tick 1719594533 because target called exit()