SPARC: Remove the last checks of FULL_SYSTEM.

This commit is contained in:
Gabe Black 2011-10-13 01:37:19 -07:00
parent 6b5ede5e39
commit 4b2e5ebead
2 changed files with 15 additions and 15 deletions

View file

@ -42,6 +42,7 @@
#include "debug/TLB.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
#include "sim/full_system.hh"
#include "sim/system.hh"
/* @todo remove some of the magic constants. -- ali
@ -497,14 +498,14 @@ TLB::translateInst(RequestPtr req, ThreadContext *tc)
if (e == NULL || !e->valid) {
writeTagAccess(vaddr, context);
if (real)
if (real) {
return new InstructionRealTranslationMiss;
else
#if FULL_SYSTEM
return new FastInstructionAccessMMUMiss;
#else
return new FastInstructionAccessMMUMiss(req->getVaddr());
#endif
} else {
if (FullSystem)
return new FastInstructionAccessMMUMiss;
else
return new FastInstructionAccessMMUMiss(req->getVaddr());
}
}
// were not priviledged accesing priv page
@ -709,14 +710,14 @@ TLB::translateData(RequestPtr req, ThreadContext *tc, bool write)
if (e == NULL || !e->valid) {
writeTagAccess(vaddr, context);
DPRINTF(TLB, "TLB: DTB Failed to find matching TLB entry\n");
if (real)
if (real) {
return new DataRealTranslationMiss;
else
#if FULL_SYSTEM
return new FastDataAccessMMUMiss;
#else
return new FastDataAccessMMUMiss(req->getVaddr());
#endif
} else {
if (FullSystem)
return new FastDataAccessMMUMiss;
else
return new FastDataAccessMMUMiss(req->getVaddr());
}
}

View file

@ -34,7 +34,6 @@
#include "arch/sparc/asi.hh"
#include "arch/sparc/tlb_map.hh"
#include "base/misc.hh"
#include "config/full_system.hh"
#include "mem/request.hh"
#include "params/SparcTLB.hh"
#include "sim/fault_fwd.hh"