diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh index 349332170..852de5554 100644 --- a/src/arch/alpha/isa_traits.hh +++ b/src/arch/alpha/isa_traits.hh @@ -37,8 +37,7 @@ namespace LittleEndianGuest {} #include "arch/alpha/types.hh" #include "base/types.hh" #include "config/full_system.hh" - -class StaticInstPtr; +#include "cpu/static_inst_fwd.hh" namespace AlphaISA { diff --git a/src/arch/arm/insts/macromem.cc b/src/arch/arm/insts/macromem.cc index e056856b6..48e561c95 100644 --- a/src/arch/arm/insts/macromem.cc +++ b/src/arch/arm/insts/macromem.cc @@ -140,12 +140,12 @@ MacroMemOp::MacroMemOp(const char *mnem, ExtMachInst machInst, } else if (load) { *++uop = new MicroUopRegMov(machInst, regIdx, INTREG_UREG1); if (reg == INTREG_PC) { - (*uop)->setFlag(StaticInstBase::IsControl); - (*uop)->setFlag(StaticInstBase::IsCondControl); - (*uop)->setFlag(StaticInstBase::IsIndirectControl); + (*uop)->setFlag(StaticInst::IsControl); + (*uop)->setFlag(StaticInst::IsCondControl); + (*uop)->setFlag(StaticInst::IsIndirectControl); // This is created as a RAS POP if (rn == INTREG_SP) - (*uop)->setFlag(StaticInstBase::IsReturn); + (*uop)->setFlag(StaticInst::IsReturn); } } diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh index 40371e065..43b3674d4 100644 --- a/src/arch/arm/isa_traits.hh +++ b/src/arch/arm/isa_traits.hh @@ -47,13 +47,12 @@ #include "arch/arm/types.hh" #include "base/types.hh" +#include "cpu/static_inst_fwd.hh" namespace LittleEndianGuest {} #define TARGET_ARM -class StaticInstPtr; - namespace ArmISA { using namespace LittleEndianGuest; diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh index 2f789c6bf..5cef45523 100644 --- a/src/arch/mips/isa_traits.hh +++ b/src/arch/mips/isa_traits.hh @@ -38,11 +38,10 @@ #include "arch/mips/types.hh" #include "base/types.hh" #include "config/full_system.hh" +#include "cpu/static_inst_fwd.hh" namespace LittleEndianGuest {} -class StaticInstPtr; - namespace MipsISA { diff --git a/src/arch/power/isa_traits.hh b/src/arch/power/isa_traits.hh index f0f50b9e9..3db4ab5aa 100644 --- a/src/arch/power/isa_traits.hh +++ b/src/arch/power/isa_traits.hh @@ -37,11 +37,10 @@ #include "arch/power/types.hh" #include "base/types.hh" +#include "cpu/static_inst_fwd.hh" namespace BigEndianGuest {} -class StaticInstPtr; - namespace PowerISA { diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh index 6992cfee1..620d9c402 100644 --- a/src/arch/sparc/isa_traits.hh +++ b/src/arch/sparc/isa_traits.hh @@ -36,8 +36,7 @@ #include "arch/sparc/types.hh" #include "base/types.hh" #include "config/full_system.hh" - -class StaticInstPtr; +#include "cpu/static_inst_fwd.hh" namespace BigEndianGuest {} diff --git a/src/arch/x86/insts/badmicroop.hh b/src/arch/x86/insts/badmicroop.hh index 0185af0d9..b9830c56f 100644 --- a/src/arch/x86/insts/badmicroop.hh +++ b/src/arch/x86/insts/badmicroop.hh @@ -40,7 +40,7 @@ #ifndef __ARCH_X86_INSTS_BADMICROOP_HH__ #define __ARCH_X86_INSTS_BADMICROOP_HH__ -class StaticInstPtr; +#include "cpu/static_inst_fwd.hh" namespace X86ISA { diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh index f67b58788..09a280215 100644 --- a/src/arch/x86/isa_traits.hh +++ b/src/arch/x86/isa_traits.hh @@ -43,8 +43,7 @@ #include "arch/x86/types.hh" #include "arch/x86/x86_traits.hh" #include "base/types.hh" - -class StaticInstPtr; +#include "cpu/static_inst_fwd.hh" namespace LittleEndianGuest {} diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index a3d18bb24..5f0a6106e 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -71,9 +71,6 @@ * Defines a dynamic instruction context. */ -// Forward declaration. -class StaticInstPtr; - template class BaseDynInst : public FastAlloc, public RefCounted { diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh index de9de5eff..3427af86b 100644 --- a/src/cpu/inorder/inorder_dyn_inst.hh +++ b/src/cpu/inorder/inorder_dyn_inst.hh @@ -71,7 +71,6 @@ */ // Forward declaration. -class StaticInstPtr; class ResourceRequest; class Packet; diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index b2773052e..adda82c49 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -41,6 +41,7 @@ #include "base/types.hh" #include "config/the_isa.hh" #include "cpu/op_class.hh" +#include "cpu/static_inst_fwd.hh" #include "sim/fault_fwd.hh" // forward declarations @@ -76,9 +77,18 @@ namespace Trace { * solely on these flags can process instructions without being * recompiled for multiple ISAs. */ -class StaticInstBase : public RefCounted +class StaticInst : public RefCounted { public: + /// Binary extended machine instruction type. + typedef TheISA::ExtMachInst ExtMachInst; + /// Logical register index type. + typedef TheISA::RegIndex RegIndex; + + enum { + MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs + MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs + }; /// Set of boolean static instruction properties. /// @@ -179,17 +189,6 @@ class StaticInstBase : public RefCounted int8_t _numIntDestRegs; //@} - /// Constructor. - /// It's important to initialize everything here to a sane - /// default, since the decoder generally only overrides - /// the fields that are meaningful for the particular - /// instruction. - StaticInstBase(OpClass __opClass) - : _opClass(__opClass), _numSrcRegs(0), _numDestRegs(0), - _numFPDestRegs(0), _numIntDestRegs(0) - { - } - public: /// @name Register information. @@ -210,7 +209,7 @@ class StaticInstBase : public RefCounted /// @name Flag accessors. /// These functions are used to access the values of the various - /// instruction property flags. See StaticInstBase::Flags for descriptions + /// instruction property flags. See StaticInst::Flags for descriptions /// of the individual flags. //@{ @@ -266,31 +265,6 @@ class StaticInstBase : public RefCounted /// Operation class. Used to select appropriate function unit in issue. OpClass opClass() const { return _opClass; } -}; - - -// forward declaration -class StaticInstPtr; - -/** - * Generic yet ISA-dependent static instruction class. - * - * This class builds on StaticInstBase, defining fields and interfaces - * that are generic across all ISAs but that differ in details - * according to the specific ISA being used. - */ -class StaticInst : public StaticInstBase -{ - public: - /// Binary extended machine instruction type. - typedef TheISA::ExtMachInst ExtMachInst; - /// Logical register index type. - typedef TheISA::RegIndex RegIndex; - - enum { - MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs - MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs - }; /// Return logical index (architectural reg num) of i'th destination reg. @@ -355,8 +329,13 @@ class StaticInst : public StaticInstBase generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0; /// Constructor. + /// It's important to initialize everything here to a sane + /// default, since the decoder generally only overrides + /// the fields that are meaningful for the particular + /// instruction. StaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass) - : StaticInstBase(__opClass), + : _opClass(__opClass), _numSrcRegs(0), _numDestRegs(0), + _numFPDestRegs(0), _numIntDestRegs(0), machInst(_machInst), mnemonic(_mnemonic), cachedDisassembly(0) { } @@ -414,37 +393,4 @@ class StaticInst : public StaticInstBase std::string getName() { return mnemonic; } }; -typedef RefCountingPtr StaticInstBasePtr; - -/// Reference-counted pointer to a StaticInst object. -/// This type should be used instead of "StaticInst *" so that -/// StaticInst objects can be properly reference-counted. -class StaticInstPtr : public RefCountingPtr -{ - public: - /// Constructor. - StaticInstPtr() - : RefCountingPtr() - { - } - - /// Conversion from "StaticInst *". - StaticInstPtr(StaticInst *p) - : RefCountingPtr(p) - { - } - - /// Copy constructor. - StaticInstPtr(const StaticInstPtr &r) - : RefCountingPtr(r) - { - } - - /// Convert to pointer to StaticInstBase class. - operator const StaticInstBasePtr() - { - return this->get(); - } -}; - #endif // __CPU_STATIC_INST_HH__ diff --git a/src/cpu/static_inst_fwd.hh b/src/cpu/static_inst_fwd.hh new file mode 100644 index 000000000..7e2172f72 --- /dev/null +++ b/src/cpu/static_inst_fwd.hh @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2011 Google + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#ifndef __CPU_STATIC_INST_FWD_HH__ +#define __CPU_STATIC_INST_FWD_HH__ + +class StaticInst; +template class RefCountingPtr; +typedef RefCountingPtr StaticInstPtr; + +#endif // __CPU_STATIC_INST_FWD_HH__