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Added support for multiple prefetch address from single access (depth of prefetch) also added the ability to squash some prefetchs to match the GHB technique

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python/m5/objects/BaseCache.mpy:
    Added parameters

--HG--
extra : convert_revision : 92b646eb61455d283a5c2ac0b3f8fbd62e39fb87
This commit is contained in:
Ron Dreslinski 2005-04-02 20:36:08 -05:00
parent 46a832eb3b
commit 4889d8f788
1 changed files with 10 additions and 1 deletions
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11
python/m5/objects/BaseCache.mpy
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@ -1,5 +1,7 @@
from BaseMem import BaseMem
class Prefetch(Enum): vals = ['none', 'tagged', 'stride', 'ghb']
simobj BaseCache(BaseMem):
type = 'BaseCache'
adaptive_compression = Param.Bool(False,
@ -44,4 +46,11 @@ simobj BaseCache(BaseMem):
"Number of entries in the harware prefetch queue")
prefetch_past_page = Param.Bool(False,
"Allow prefetches to cross virtual page boundaries")
prefetch_serial_squash = Param.Bool(False,
"Squash prefetches with a later time on a subsequent miss")
prefetch_degree = Param.Int(1,
"Degree of the prefetch depth")
prefetch_latency = Param.Tick(10,
"Latency of the prefetcher")
prefetch_policy = Param.Prefetch('none',
"Type of prefetcher to use")